Minimized reversible synthesis of non-reversible quinary logic function

• Published in: 2009 12th International Conference on Computers and Information Technology pp. 186 - 191
• Main Authors: Khan, M.H.A., Hasan, R.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-12-2009
• Subjects: Circuit synthesis; Computer science; DH-HEMTs; Galois field expansion; Galois fields; GFSOP expression; GFSOP minimization; GFSOP synthesis; Information technology; Input variables; Logic circuits; Logic functions; Minimization methods; Paper technology; quinary logic; reversible logic
• ISBN: 9781424462810; 1424462819
• DOI: 10.1109/ICCIT.2009.5407142

Reversible multiple-valued logic circuit has several advantages over reversible binary logic circuit. In this paper, we propose a method of minimization of Galois field sum of products (GFSOP) expression for non-reversible quinary logic function. We also propose a method of reversible realization of quinary GFSOP expression as cascade of quinary reversible gates. Experimental results show that a significant minimization can be achieved using the proposed minimization method.