Analog layout constraints resolution and shape function generation using Satisfiability Modulo Theories

• Published in: 2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) pp. 1 - 6
• Main Authors: Saif, Sherif M., Dessouky, Mohamed, Abbas, Hazem, El-Kharashi, M. Watheq, Nassar, Salwa
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-04-2015
• Subjects: analog placement; aspect ratio; constraints; Diffusion tensor imaging; formal methods; layout; Nanoscale devices; placement; Radio frequency; shape function; World Wide Web
• DOI: 10.1109/DTIS.2015.7127355

This paper exploits one of the formal methods to generate layouts for an analog circuit, where these layouts satisfy some given analog constraints. The analog constraints are provided by the user through a text file and the used method is the Satisfiability Modulo Theories solving. After generating the layouts as valid solutions for the given constraints, the paper shows how different aspect ratios can be used in order to draw the shape function. The shape function allows the user to find optimal layouts and accordingly select one of them, given some acceptable ranges for aspect ratios, width, and height.