Design and implementation of 3D-thermal test chip for exploration of package effects

• Published in: 2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) pp. 238 - 241
• Main Authors: Jui-Hung Chien, Chiao-Ling Lung, Ta-Wei Lin, Kun-Ju Tsai, Ting-Sheng Chen, Yung-Fa Chou, Ping-Hei Chen, Shih-Chieh Chang, Ding-Ming Kwai
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-10-2011
• Subjects: Heating; Semiconductor device measurement; Temperature measurement; Temperature sensors; Thermal management; Three dimensional displays
• ISBN: 145771387X; 9781457713873
• ISSN: 2150-5934; 2150-5942
• DOI: 10.1109/IMPACT.2011.6117289

Thermal solution and thermal management are critical issues in either 2.5D or 3D stacking design, especially when the hotspots are not located next to the heat sink. On the other hand, chip and package designers are eager to know the realtime temperature performance of the stacked chips therefore the workload can be assigned to the proper domain. Hence, a thermal test chip for evaluating the package is proposed in this paper. The thermal sensor network based on a ring oscillator is implemented in this work. Infrared radiation microscopic is employed for inspecting the real-time temperature performance of the chip and package. Four types of package are implemented and experimented by inspection of infrared radiation thermography. The experimental results show that one of proposed design provides good temperature consistency within difference of 0.6°C with the thermal sensors. Meanwhile, the proposed package has excellent capability for evaluating thermal management of the stacked dies by providing good thermal non-uniformity by 0.035°C/mm.