Charge Loss Mechanisms in a Localized Trapping Based Nonvolatile Memory Device

Charge Loss Mechanisms in a Localized Trapping Based Nonvolatile Memory Device

In this work, quantification of the theories and models attributed to the NROM cell V t decay and the dominant charge loss mechanism dictating this phenomenon are discussed. The main objective is to determine whether the transport of the localized trapped charge is mainly lateral within the nitride...

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Bibliographic Details
Published in:2006 IEEE 24th Convention of Electrical & Electronics Engineers in Israel pp. 364 - 365
Main Authors: Yael Shur, Shacham-Diamand, Y., Lusky, E., Eitair, B., Shappir, A.
Format: Conference Proceeding
Language:English
Published: IEEE 01-11-2006
Subjects:
Dielectrics
Electron traps
FETs
Hot carrier injection
Nonvolatile memory
Silicon
Solid state circuits
Substrates
Temperature
Threshold voltage
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Summary:In this work, quantification of the theories and models attributed to the NROM cell V t decay and the dominant charge loss mechanism dictating this phenomenon are discussed. The main objective is to determine whether the transport of the localized trapped charge is mainly lateral within the nitride layer or vertical back to the silicon substrate. Electrical characterizations and analytic modeling are employed for comparison of theories.
ISBN:9781424402298
1424402298
DOI:10.1109/EEEI.2006.321104