Electrical characterization of read window in reram arrays under different SET/RESET cycling conditions

• Published in: 2014 IEEE 6th International Memory Workshop (IMW) pp. 1 - 4
• Main Authors: Zambelli, Cristian, Grossi, Alessandro, Olivo, Piero, Walczyk, Damian, Dabrowski, Jarek, Tillack, Bernd, Schroeder, Thomas, Kraemer, Rolf, Stikanov, Valeriy, Walczyk, Christian
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-05-2014
• Subjects: Bit error rate; Decoding; Hafnium compounds; Materials; Reliability; Switches; Tin
• ISBN: 9781479935949; 1479935948
• ISSN: 2159-483X
• DOI: 10.1109/IMW.2014.6849387

In this work a SET/RESET investigation in cycling on ReRAM arrays has been performed, in order to find the most reliable SET/RESET operation conditions. The analysis will compare DC and pulsed SET/RESET operations featuring different durations and voltages on previously DC formed 1T-lR4kbits memory arrays. A thorough analysis of the ReRAM reliability joining the cell-to-cell variability analysis to that of cycling evaluations in complete arrays is addressed. A comparison between DC and Pulse SET/RESET in terms of switching yield, read window, device-to-device uniformity and bit error rate is reported. Finally, the impact of a temperature bake at 125 0 C on a cycled array is shown to study the temperature impact on the array variability.