A 45nm resilient and adaptive microprocessor core for dynamic variation tolerance

A 45nm resilient and adaptive microprocessor core for dynamic variation tolerance

A 45 nm 1.3 GHz microprocessor core employs error-detection circuits, tunable replica circuits, and error-recovery circuits, to mitigate dynamic variation guardbands for maximum throughput. An adaptive clock controller adjusts the frequency based on error statistics to optimize efficiency. Silicon m...

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Bibliographic Details
Published in:2010 IEEE International Solid-State Circuits Conference - (ISSCC) pp. 282 - 283
Main Authors: Tschanz, J., Bowman, K., Shih-Lien Lu, Aseron, P., Khellah, M., Raychowdhury, A., Geuskens, B., Tokunaga, C., Wilkerson, C., Karnik, T., De, V.
Format: Conference Proceeding
Language:English
Published: IEEE 01-02-2010
Subjects:
Adaptive control
Clocks
Error analysis
Frequency
Gain measurement
Microprocessors
Programmable control
Silicon
Throughput
Tunable circuits and devices
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Summary:A 45 nm 1.3 GHz microprocessor core employs error-detection circuits, tunable replica circuits, and error-recovery circuits, to mitigate dynamic variation guardbands for maximum throughput. An adaptive clock controller adjusts the frequency based on error statistics to optimize efficiency. Silicon measurements show resilient operation as well as throughput gains of 12 to 16% at 1.0 V and 22 to 23% at 0.8 V.
ISBN:1424460336
9781424460335
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2010.5433922