Quantized Conductance Of A Gate-All-Around Silicon Quantum Wire Transistor

Quantized Conductance Of A Gate-All-Around Silicon Quantum Wire Transistor

As the dimension of VLSI technology approaches the nanometer scale, various fabrication methods have been proposed to establish one-dimensional (1-D) electron confinement. In this work, we have fabricated a gate-all-around silicon quantum wire transistor on an SO1 wafer using electron beam lithograp...

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Bibliographic Details
Published in:Digest of Papers. Microprocesses and Nanotechnology'98. 198 International Microprocesses and Nanotechnology Conference (Cat. No.98EX135) pp. 150 - 151
Main Authors: Minkyu Je, Sangyeon Han, Ilgweon Kim, Hyungcheol Shin
Format: Conference Proceeding
Language:English
Published: IEEE 1998
Subjects:
Electrons
Etching
Fabrication
Lithography
MOSFETs
Numerical analysis
Silicon
Temperature
Voltage
Wire
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Summary:As the dimension of VLSI technology approaches the nanometer scale, various fabrication methods have been proposed to establish one-dimensional (1-D) electron confinement. In this work, we have fabricated a gate-all-around silicon quantum wire transistor on an SO1 wafer using electron beam lithography, anisotropic dry etching, and thermal oxidation. The 1-D transport properties of the device has been examined and studied.
ISBN:9784930813831
4930813832
DOI:10.1109/IMNC.1998.730018