Hardware Implementation of K2RED and Plantard Modular Multiplication Algorithms in Post-Quantum Cryptography
As the era of Post-Quantum Cryptography emerges, the demand for efficient and secure cryptographic algorithms has intensified. This conference paper navigates through the details of employing Number Theoretic Transform based modular multiplication algorithm which is K 2 RED tailored for post-quantum...
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Published in: | 2024 Panhellenic Conference on Electronics & Telecommunications (PACET) pp. 1 - 6 |
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Main Authors: | , , , , |
Format: | Conference Proceeding |
Language: | English |
Published: |
IEEE
28-03-2024
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Subjects: | |
Online Access: | Get full text |
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Summary: | As the era of Post-Quantum Cryptography emerges, the demand for efficient and secure cryptographic algorithms has intensified. This conference paper navigates through the details of employing Number Theoretic Transform based modular multiplication algorithm which is K 2 RED tailored for post-quantum cryptographic applications, with a specific emphasis on their Field Programmable Gate Array implementation. NTT is an operation of Lattice Based Cryptography and it converts the numbers to finite field and modular multiplication operation is carried out. So, modular multiplication is the essential operation of NTT and its efficiency is critical for NTT operation. Our findings not only contribute to the growing body of knowledge in PQC but also offer practical guidance for engineers and researchers seeking to implement robust and efficient cryptographic solutions on FPGA platforms. The presented performance metrics serve as a benchmark for evaluating the feasibility and scalability of modular multiplication algorithms in the context of PQC systems. We present a detailed analysis of the area, speed, and latency performance of the implemented modular multiplication algorithms on FPGA platforms. Given the novelty offered by this study, it has demonstrated that the K 2 RED algorithm can be used with different bit lengths. Similarly, Plantard and K 2 RED algorithms have been utilized to create and report different circuit schematics according to various requirements. |
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DOI: | 10.1109/PACET60398.2024.10497033 |