An Implementation Technique of Multi-Cycled Arithmetic Functions For a Dynamically Reconfigurable Processor

Dynamically reconfigurable processor (DRP) released by NEC Electronics is expected to have potential for high degree of parallel processing. Applications for DRP are described in C language, and parallelism in the source code is automatically extracted by a compiler. On the other hand, it is also im...

Full description

Bibliographic Details

Published in:	2006 International Conference on Field Programmable Logic and Applications pp. 1 - 4
Main Authors:	Miyata, M., Tsuchiya, H., Shibata, Y., Oguri, K.
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01-08-2006
Subjects:	Automata Digital arithmetic Fixed-point arithmetic Galois fields National electric code Parallel processing Phase locked loops Polynomials Switches Tiles
Online Access:	Get full text
Tags:	Add Tag No Tags, Be the first to tag this record!