Application of a multi-processor SoC platform to high-speed packet forwarding

• Published in: Proceedings Design, Automation and Test in Europe Conference and Exhibition Vol. 3; pp. 58 - 63 Vol.3
• Main Authors: Paulin, P.G., Pilkington, C., Bensoudane, E., Langevin, M., Lyonnard, D.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2004
• Subjects: Application specific processors; Costs; Digital signal processing; Hardware; Libraries; Manufacturing; Network topology; Network-on-a-chip; Productivity; Streaming media
• DOI: 10.1109/DATE.2004.1269203
• EISSN: 1558-1101
• ISBN: 0769520855; 9780769520858
• ISSN: 1530-1591

In this paper, we explore the requirements of emerging complex SoC's and describe StepNP, an experimental flexible, multi-processor SoC platform targeted towards communications and networking applications. We present the results of mapping an internet protocol (IPv4) packet forwarding application, running at 2.5 Gb/s and 10 Gb/s. We demonstrate how the use of high-speed hardware-assisted messaging and dynamic task allocation in the StepNP platform allows us to achieve very high processor utilization rates (up to 97%) in spite of the presence of high network-on-chip and memory access latencies. The inter-processor communication overhead is kept very low, representing only 9% of instructions.