Prototyping Efficient Interprocessor Communication Mechanisms

• Published in: 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation pp. 26 - 33
• Main Authors: Papaefstathiou, V., Pnevmatikatos, D., Marazakis, M., Kalokairinos, G., Ioannou, A., Papamichael, M., Kavadias, S., Mihelogiannakis, G., Katevenis, M.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-07-2007
• Subjects: Computational modeling; Computer architecture; Costs; Delay; Kernel; Network interfaces; Parallel processing; Prototypes; Throughput; Virtual prototyping
• DOI: 10.1109/ICSAMOS.2007.4285730
• ISBN: 1424410584; 9781424410583

Parallel computing systems are becoming widespread and grow in sophistication. Besides simulation, rapid system prototyping becomes important in designing and evaluating their architecture. We present an efficient FPGA-based platform that we developed and use for research and experimentation on high speed interprocessor communication, network interfaces and interconnects. Our platform supports advanced communication capabilities such as remote DMA, remote queues, zero-copy data delivery and flexible notification mechanisms, as well as link bundling for increased performance. We report on the platform architecture, its design cost, complexity and performance (latency and throughput). We also report our experiences from implementing benchmarking kernels and a user-level benchmark application, and show how software can take advantage of the provided features, but also expose the weaknesses of the system.