A Scalable Integrated DC/DC Converter with Enhanced Load Transient Response and Security for Emerging SoC Applications

• Published in: 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS) pp. 1 - 4
• Main Authors: Liu, Xingye, Ampadu, Paul
• Format: Conference Proceeding
• Language: English
• Published: IEEE 07-08-2022
• Subjects: Complexity theory; Correlation coefficient; DC/DC converter; dynamic voltage scaling; load transient response; power side-channel security; scalability; Security; Side-channel attacks; System-on-chip; Transient response; Voltage
• ISSN: 1558-3899
• DOI: 10.1109/MWSCAS54063.2022.9859336

In this paper we propose a novel integrated DC/DC converter featuring a single-input-multiple-output architecture for emerging System-on-Chip applications to improve load transient response and power side-channel security. The converter is able to provide multiple outputs ranging from 0.3V to 0.92V using a global 1V input. By using modularized circuit blocks, the converter can be extended to provide higher power or more outputs with minimal design complexity. Performance metrics including power efficiency and load transient response can be well maintained as well. Implemented in 32nm technology, single output efficiency can reach to 88% for the post layout models. By enabling delay blocks and circuits sharing, the Pearson correlation coefficient of input and output can be reduced to 0.1 under rekeying test. The reference voltage tracking speed is up to 31.95 V/μs and peak load step response is 53 mA/ns. Without capacitors, the converter consumes 2.85 mm 2 for high power version and only 1.4 mm 2 for the low power case.