Near Data Processing Performance Improvement Prediction via Metric-Based Workload Classification

Contrary to the improvement of CPU capabilities, traditional DRAM evolution faced significant challenges that render it the main performance bottleneck in contemporary systems. Data-Intensive applications such as Machine Learning and Graph Processing algorithms depend on time and energy consuming tr...

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Published in:2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST) pp. 1 - 4
Main Authors: Papalekas, Dimitrios, Tziouvaras, Athanasios, Floros, George, Dimitriou, Georgios, Dossis, Michael, Stamoulis, Georgios
Format: Conference Proceeding
Language:English
Published: IEEE 08-06-2022
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Abstract Contrary to the improvement of CPU capabilities, traditional DRAM evolution faced significant challenges that render it the main performance bottleneck in contemporary systems. Data-Intensive applications such as Machine Learning and Graph Processing algorithms depend on time and energy consuming transactions between the memory bus and the CPU caches. The emergence of 3D-Stacked memories that provide a very high bandwidth led to the exploration of the Process-In-Memory (PIM) paradigm where logic is added to the memory die and data are being processed where they reside. To fully exploit this model, there is a need to methodically determine the portions of code that are better fitted for Near-Data-Processing (NDP). To this extend, in this work, after presenting the key trends of the research field and examine proposed criteria, we simplify the process of a priori decision of a block's suitability by proposing a two-step metric-based application categorization able to predict the applications behavior when offloaded for NDP.
AbstractList Contrary to the improvement of CPU capabilities, traditional DRAM evolution faced significant challenges that render it the main performance bottleneck in contemporary systems. Data-Intensive applications such as Machine Learning and Graph Processing algorithms depend on time and energy consuming transactions between the memory bus and the CPU caches. The emergence of 3D-Stacked memories that provide a very high bandwidth led to the exploration of the Process-In-Memory (PIM) paradigm where logic is added to the memory die and data are being processed where they reside. To fully exploit this model, there is a need to methodically determine the portions of code that are better fitted for Near-Data-Processing (NDP). To this extend, in this work, after presenting the key trends of the research field and examine proposed criteria, we simplify the process of a priori decision of a block's suitability by proposing a two-step metric-based application categorization able to predict the applications behavior when offloaded for NDP.
Author Stamoulis, Georgios
Tziouvaras, Athanasios
Dimitriou, Georgios
Papalekas, Dimitrios
Floros, George
Dossis, Michael
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Snippet Contrary to the improvement of CPU capabilities, traditional DRAM evolution faced significant challenges that render it the main performance bottleneck in...
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SubjectTerms 3D-Stacked memories
Codes
Machine learning
Machine learning algorithms
Measurement
Near-Data-Processing
Processing-In-Memory
Random access memory
Software algorithms
Title Near Data Processing Performance Improvement Prediction via Metric-Based Workload Classification
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