Development of Time-Varying PLL Macromodel for Jitter Evaluation

• Published in: 2018 IEEE East-West Design & Test Symposium (EWDTS) pp. 1 - 7
• Main Authors: Gourary, M.M., Rusakov, S.G., Ulyanov, S.L., Zharov, M.M.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-09-2018
• Subjects: Harmonic analysis; Jitter; Linear systems; Perturbation methods; Phase locked loops; Phase modulation; Voltage-controlled oscillators
• ISSN: 2472-761X
• DOI: 10.1109/EWDTS.2018.8524678

An approach to analyze PLL jitter under noise excitations of the different origin is considered in the paper. Both internal device noise and external switching noise can be captured by the proposed approach. Jitter evaluation is provided by obtaining phase transfer functions (TF) from any circuit node to the PLL output. Unlike previous works explaining noise folding in PLL by sampling processes, this paper shows that spectrum aliasing in PLL blocks appears in both digital and analog PLL due to principal properties of Linear Periodically Time- Varying (LPTV) systems. Expressions for the evaluation TF of PLL blocks are presented. The PLL macromodel developed in the form of block diagram allowed the authors to derive the set of PLL TFs. Different approaches to the evaluation of the phase TF by additive TFs of electrical harmonics are discussed.