1.8mW, hybrid-pipelined H.264/AVC decoder for mobile devices

To meet the performance, area and power requirement constraints of H.264/AVC, we propose a hybrid pipeline architecture, and a data reuse mechanism to reduce off-chip memory access. A 4x4 sub-macroblock pipeline architecture is optimized for low power as well as performance. The proposed H.264/AVC d...

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Published in:	2007 IEEE Asian Solid-State Circuits Conference pp. 192 - 195
Main Authors:	Sangkwon Na, Woong Hwangbo, Jaemoon Kim, Seunghan Lee, Chong-Min Kyung
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01-11-2007
Subjects:	Automatic voltage control Decoding Hardware IEC standards ISO standards Pipeline processing Solid state circuits Streaming media Throughput Video coding
Online Access:	Get full text
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Abstract	To meet the performance, area and power requirement constraints of H.264/AVC, we propose a hybrid pipeline architecture, and a data reuse mechanism to reduce off-chip memory access. A 4x4 sub-macroblock pipeline architecture is optimized for low power as well as performance. The proposed H.264/AVC decoder architecture can support CIF(352x288) 30 fps videos at 6MHz with 1.8 mW @ 1.65 V, implemented in 0.18 mum technology.
AbstractList	To meet the performance, area and power requirement constraints of H.264/AVC, we propose a hybrid pipeline architecture, and a data reuse mechanism to reduce off-chip memory access. A 4x4 sub-macroblock pipeline architecture is optimized for low power as well as performance. The proposed H.264/AVC decoder architecture can support CIF(352x288) 30 fps videos at 6MHz with 1.8 mW @ 1.65 V, implemented in 0.18 mum technology.
Author	Woong Hwangbo Chong-Min Kyung Jaemoon Kim Sangkwon Na Seunghan Lee
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Snippet	To meet the performance, area and power requirement constraints of H.264/AVC, we propose a hybrid pipeline architecture, and a data reuse mechanism to reduce...
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SubjectTerms	Automatic voltage control Decoding Hardware IEC standards ISO standards Pipeline processing Solid state circuits Streaming media Throughput Video coding
Title	1.8mW, hybrid-pipelined H.264/AVC decoder for mobile devices
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