A Torus Embedded Hypercube Scalable Interconnection Network for Parallel Architecture

• Published in: 2009 IEEE International Advance Computing Conference pp. 858 - 861
• Main Authors: Kini, N.G., Kumar, M.S., Mruthyunjaya, H.S.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-03-2009
• Subjects: Computer architecture; Computer networks; Concurrent computing; Concurrent torus network; Data analysis; Data routing path; Embedded computing; Embedded network; Hypercube network; Hypercubes; Multiprocessor interconnection networks; Network parameters; Network topology; Parallel architectures; Routing; Scalability
• DOI: 10.1109/IADCC.2009.4809127
• ISBN: 9781424429271; 1424429277

This paper analyzes an embedded architecture of torus network with the hypercube pertinent to parallel architecture. The product generated from torus and hypercube networks show how good interconnection network can be designed for parallel computation. The advantages of hypercube network and torus topology are used for product network known as Torus embedded hypercube network. A complete design analysis, data routing and comparison of this network with basic networks is given using network parameters.