Work-in-Progress: On Leveraging Approximations for Exact System-level Design Space Exploration

In order to find good design points for embedded systems, an efficient exploration of the design space is imperative. The ever-increasing complexity of embedded systems, however, results in a deterioration of the overall exploration performance. The DSE essentially consists of two parts: (1) the sea...

Full description

Saved in:
Bibliographic Details
Published in:2018 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) pp. 1 - 2
Main Authors: Neubauer, Kai, Haubelt, Christian, Wanko, Philipp, Schaub, Torsten
Format: Conference Proceeding
Language:English
Published: IEEE 01-09-2018
Subjects:
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Abstract In order to find good design points for embedded systems, an efficient exploration of the design space is imperative. The ever-increasing complexity of embedded systems, however, results in a deterioration of the overall exploration performance. The DSE essentially consists of two parts: (1) the search for feasible solutions and (2) the evaluation of found feasible solutions. While the search has been massively improved by ASPmT-based strategies, the evaluation emerges as the main bottleneck. Tragically, evaluating bad solutions takes as much time as evaluating good ones. Hence, in this paper we study the utilization of approximations in the evaluation process integrated in an ASPmT-based DSE to identify bad solutions more quickly while still retaining the exact Pareto-front.
AbstractList In order to find good design points for embedded systems, an efficient exploration of the design space is imperative. The ever-increasing complexity of embedded systems, however, results in a deterioration of the overall exploration performance. The DSE essentially consists of two parts: (1) the search for feasible solutions and (2) the evaluation of found feasible solutions. While the search has been massively improved by ASPmT-based strategies, the evaluation emerges as the main bottleneck. Tragically, evaluating bad solutions takes as much time as evaluating good ones. Hence, in this paper we study the utilization of approximations in the evaluation process integrated in an ASPmT-based DSE to identify bad solutions more quickly while still retaining the exact Pareto-front.
Author Wanko, Philipp
Neubauer, Kai
Haubelt, Christian
Schaub, Torsten
Author_xml – sequence: 1
  givenname: Kai
  surname: Neubauer
  fullname: Neubauer, Kai
  email: kai.neubauer@uni-rostock.de
  organization: University of Rostock, Germany
– sequence: 2
  givenname: Christian
  surname: Haubelt
  fullname: Haubelt, Christian
  email: christian.haubelt@uni-rostock.de
  organization: University of Rostock, Germany
– sequence: 3
  givenname: Philipp
  surname: Wanko
  fullname: Wanko, Philipp
  email: wanko@cs.uni-potsdam.de
  organization: University of Potsdam, Germany
– sequence: 4
  givenname: Torsten
  surname: Schaub
  fullname: Schaub, Torsten
  email: torsten@cs.uni-potsdam.de
  organization: University of Potsdam, Germany
BookMark eNotUN1KwzAYjaCgzj6BIHmBzvw2iXejmzoYTKjinSO2X0u0S0pSZHt7i-7qXJwfzjnX6NwHDwjdUTKnlJj7crtcVeuqquaMUD3XkkmjxBnKjNJUcl1IWTB1ibKUvgghrNCy4PwKfbyH-J07n7_E0EVI6QFvPd7AD0TbOd_hxTDEcHB7O7rgE25DxKuDrUdcHdMI-7yfpD1eQnKdx9Vga5j4oQ_xz3CDLlrbJ8hOOENvj6vX8jnfbJ_W5WKTO6rkmDdg4NMIxZhmpGlkzSm3jLdGMMuVgULphlhFBbUwzTOWiFYJIiSvW9tKxmfo9j_XAcBuiFPfeNydXuC_5exWLQ
ContentType Conference Proceeding
DBID 6IE
6IL
CBEJK
RIE
RIL
DOI 10.1109/CODESISSS.2018.8525974
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume
IEEE Xplore All Conference Proceedings
IEEE Electronic Library Online
IEEE Proceedings Order Plans (POP All) 1998-Present
DatabaseTitleList
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library Online
  url: http://ieeexplore.ieee.org/Xplore/DynWel.jsp
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
EISBN 9781538655627
1538655624
EndPage 2
ExternalDocumentID 8525974
Genre orig-research
GroupedDBID 6IE
6IF
6IL
6IN
AAJGR
ABLEC
ALMA_UNASSIGNED_HOLDINGS
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CBEJK
IEGSK
OCL
RIE
RIL
ID FETCH-LOGICAL-i175t-de9eb94722820dd5c313a23f942a379e678d0a7141ae0189a04f740453cfaf523
IEDL.DBID RIE
IngestDate Thu Jun 29 18:38:26 EDT 2023
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-i175t-de9eb94722820dd5c313a23f942a379e678d0a7141ae0189a04f740453cfaf523
PageCount 2
ParticipantIDs ieee_primary_8525974
PublicationCentury 2000
PublicationDate 2018-Sept.
PublicationDateYYYYMMDD 2018-09-01
PublicationDate_xml – month: 09
  year: 2018
  text: 2018-Sept.
PublicationDecade 2010
PublicationTitle 2018 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
PublicationTitleAbbrev CODESISSS
PublicationYear 2018
Publisher IEEE
Publisher_xml – name: IEEE
SSID ssj0002685633
Score 1.7372326
Snippet In order to find good design points for embedded systems, an efficient exploration of the design space is imperative. The ever-increasing complexity of...
SourceID ieee
SourceType Publisher
StartPage 1
SubjectTerms Approximation
Design Space Exploration
Embedded systems
Estimation
Filtering theory
Linear programming
Search problems
Space exploration
System-level design
Title Work-in-Progress: On Leveraging Approximations for Exact System-level Design Space Exploration
URI https://ieeexplore.ieee.org/document/8525974
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://sdu.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1NSwMxEA22J08qrfhNDh5Nu7tJN4k3abdUEFtYBU-WaTKBgmzFttCfb5JdKoIXbyEkBCYhM5m894aQW4BQxZgLJqwDJiDN2cKBYcoanSC4BY9i1ZNSPr-pURFkcu72XBhEjOAz7IVm_Mu3K7MNqbK-GmQh_m2RltSq5mrt8ylZrgY55w0JOE10fzgdFeVjWZYBwKV6zeRfVVSiExkf_W_5Y9L9YePR2d7PnJADrDrkPWS52bJiswCw8tfVPZ1W9An9yYx1h-hDEAvfLWtm4pr62JQWOzAbWmuUs4-AFqKjCOCgpX85I63xeHFCl7yOi5fhhDW1EtjSBwAbZlHjQgflR-_SrR0YnnLIuNMiAy41ep9kE5CpSAG9NTQkwknh4zluHDj_Gj0l7WpV4RmhQnJrTGpsLjM_yCiXZRpylYPjjkt5TjrBNvPPWg5j3pjl4u_uS3IYzF_Dsq5Ie_O1xWvSWtvtTdzAb6ZSnX8
link.rule.ids 310,311,782,786,791,792,798,27934,54767
linkProvider IEEE
linkToHtml http://sdu.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1NawIxEA3VHtpTW7T0uzn02OjuJrvZ9FZ0RalVYS30VBnzAYKspSr485tkF0uhl95CSCBMQmYyee8NQg8ArooxZYQpA4RBmJC5AUlSJUWgwcypF6vu53z0nnYzJ5PzuOfCaK09-Ey3XNP_5auV3LpUWTuNIxf_1tBhzHjCS7bWPqMSJWmcUFrRgMNAtDvjbpYP8jx3EK60VU3_VUfFu5Heyf8WcIqaP3w8PNl7mjN0oIsG-nB5brIoyMRBrOyF9YTHBR5qezZ95SH87OTCd4uSm7jGNjrF2Q7kBpcq5WTp8EK46yEcOLdvZ41LRJ6f0ERvvWza6ZOqWgJZ2BBgQ5QWei6c9qN16krFkoYUImoEi4Byoa1XUgHwkIWgrTUEBMxwZiM6Kg0Y-x49R_ViVegLhBmnSspQqoRHdpBMTRQJSNIEDDWU80vUcLaZfZaCGLPKLFd_d9-jo_70dTgbDkYv1-jYbUUJ0rpB9c3XVt-i2lpt7_xmfgMgPqDQ
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=2018+International+Conference+on+Hardware%2FSoftware+Codesign+and+System+Synthesis+%28CODES%2BISSS%29&rft.atitle=Work-in-Progress%3A+On+Leveraging+Approximations+for+Exact+System-level+Design+Space+Exploration&rft.au=Neubauer%2C+Kai&rft.au=Haubelt%2C+Christian&rft.au=Wanko%2C+Philipp&rft.au=Schaub%2C+Torsten&rft.date=2018-09-01&rft.pub=IEEE&rft.spage=1&rft.epage=2&rft_id=info:doi/10.1109%2FCODESISSS.2018.8525974&rft.externalDocID=8525974