Software-hardware co-design for video coding acceleration

• Published in: Proceedings of the 2012 44th Southeastern Symposium on System Theory (SSST) pp. 57 - 60
• Main Authors: Xinwei Niu, Galarza, L., Ying Gao, Fan, J.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-03-2012
• Subjects: Acceleration; Co-processor; Embedded System; Encoding; Energy consumption; H.264; Hardware; Hardware Acceleration; IP networks; Software; Video coding
• ISBN: 9781457714924; 1457714922
• ISSN: 0094-2898; 2161-8135
• DOI: 10.1109/SSST.2012.6195122

In this paper, an advanced video coding acceleration based on software-hardware co-design for low power embedded system is proposed. Today, people enjoy HD video formats all over the world, but to compress it into a portable format (such as H.264) costs too much time. In embedded systems, it is very costly to transform the entire software application into a hardware solution especially if it will consume a large amount of power. Thus, we studied the famous H.264 model in order to explore the hotspot function and balance the tradeoff between speed and energy consumption. The idea is to only transform the more readily used functions into hardware by designing a coprocessor and implementing it on Virtex 5 Field-Programmable Gate Array (FPGA) platform. The experimental results from this hardware implementation showed a 5 times increase in coding speed while minimizing the energy consumption to around 81 percent.