FIFO locked loop control system

FIFO locked loop control system

In this paper we present a methodology for the development of a circuit to control the reading frequency of a First In First Out (FIFO) memory based on the monitoring of its filling level, with applications in data communication protocol justification architectures for tributary signal mapping and d...

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Bibliographic Details
Published in:2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) pp. 566 - 569
Main Authors: Bassan, F. R., de Camargo Angeli, B. C., de Barros, L. P. F., Mobilon, E.
Format: Conference Proceeding
Language:English
Published: IEEE 01-08-2012
Subjects:
Control systems
Equations
Filling
Frequency control
Mathematical model
Payloads
Pulse width modulation
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Summary:In this paper we present a methodology for the development of a circuit to control the reading frequency of a First In First Out (FIFO) memory based on the monitoring of its filling level, with applications in data communication protocol justification architectures for tributary signal mapping and demapping.
ISBN:1467325260
9781467325264
ISSN:1548-3746
1558-3899
DOI:10.1109/MWSCAS.2012.6292083