Non-Contact, Pad-less Measurement Technology and Test Structures for Characterization of Cross-Wafer and In-Die Product Variability

• Published in: 2009 IEEE International Conference on Microelectronic Test Structures pp. 91 - 95
• Main Authors: Steinbrueck, G., Vickers, J.S., Babazadeh, M., Pelella, M.M., Pakdaman, N.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-03-2009
• Subjects: Circuit testing; Commercialization; Integrated circuit manufacture; Integrated circuit measurements; Integrated circuit technology; Manufacturing processes; Metrology; Monitoring; Process design; Semiconductor device manufacture
• ISBN: 1424442591; 9781424442591
• ISSN: 1071-9032; 2158-1029
• DOI: 10.1109/ICMTS.2009.4814617

Monitoring and controlling cross-wafer and in-die variability has been recognized as the dominant and escalating factors for the successful commercialization of modern-day integrated circuit products utilizing advanced semiconductor manufacturing. In this paper we present a Performance Based Metrology (PBM), a measurement technology for closing the information gap between the design, process integration, and manufacturing groups with respect to accounting for variability. PBM enables the "porting" of scribe-like and end-of-line contact tested measurements to within the product die active area to it provide the capability to significantly reduce the cycles of learning to obtain relevant and key process, device, and product metrics. This product-relevant information can then be used for process monitoring and control, performance optimization, and to enhance early bin-yield predictability. The technique would reduce or eliminate the need for send-ahead test wafers and other "disruptive" measurements by making possible in-die, non-contact characterization of product performance monitors and devices. We describe the in-line measurement system and review the design and implementation considerations for the non-contact test structures incorporated on product wafers. Experimental results from PBM measurements on several generations (90, 65, and 45 nm) of bulk-Si and SOI product wafers and devices are presented to illustrate the capabilities of the technique.