Combining unspecified test data bit filling methods and run length based codes to estimate compression, power and area overhead

• Published in: 2010 IEEE Asia Pacific Conference on Circuits and Systems pp. 40 - 43
• Main Authors: Mehta, U S, Dasgupta, K S, Devashrayee, N M
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-12-2010
• Subjects: Code Based Data Compression Methods; Compression Predicted by Entropy; Decoding; EFDR; Encoding; Entropy; FDR; Filling; MFDR; System-on-a-chip; Test data compression; Unspecified Test Data
• DOI: 10.1109/APCCAS.2010.5774808
• ISBN: 142447454X; 9781424474547

For SoCs (Sea of Cores!) which contains a large amount of IP cores with pre computed test data, the code based test data compression scheme is more suitable as it does not require any knowledge of internal nodes of IP. The data compression of any partially specified test data depends upon how the unspecified bits are filled with 1s and 0s. In this paper, the five different approaches for don't care bit filling based on nature of runs are proposed. These methods are used here to predict the maximum compression based on entropy relevant to different run length based data compression code. These methods are also analyzed for test power and area overhead corresponding to run length based codes. The results are shown with various ISCAS circuits.