Stage-oriented, Mixed Design Methodology for Image Processing Using VHDL and Python

The data analysis could be a very time consuming process during the hardware design on FPGA platforms. The verification process of designed modules is important at each step of a design process. In some cases standard methods for data analysis are insufficient, especially when the data representatio...

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Bibliographic Details

Published in:	2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" pp. 375 - 378
Main Authors:	Chojnacki, Marcin, Sekalski, Przemyslaw
Format:	Conference Proceeding
Language:	English
Published:	Department of Microelectronics and Computer Science, Lodz University of Technology 01-06-2019
Subjects:	Analytical models Field programmable gate arrays FPGA Hardware Image processing Matlab Python: image processing simulation stage VHDL
Online Access:	Get full text
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