ASIC and DSP implementation of channel filter for 3G wireless TDD system

• Published in: Proceedings 14th Annual IEEE International ASIC/SOC Conference (IEEE Cat. No.01TH8558) pp. 47 - 51
• Main Authors: Vejanovski, R., Singh, J., Faulkner, M.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2001
• Subjects: Application specific integrated circuits; Circuit simulation; Digital signal processing; Electronic design automation and methodology; Finite impulse response filter; Multiaccess communication; Pulse circuits; Pulse shaping methods; Shape; Transmitters
• ISBN: 9780780367418; 0780367413
• DOI: 10.1109/ASIC.2001.954671

Describes the design, simulation and implementation of a high performance low power pulse-shaping finite impulse response (FIR) filter. The filter is used for a time division duplex (TDD)-wideband code division multiple access (WCDMA) transmitter. The pulse shape filter will be implemented on a digital signal processor (DSP) and as an application specific integrated circuit (ASIC). A performance analysis and comparison using industry standard electronic design automation (EDA) tools will be carried out.