A Unipolar Phase Disposition Pulse Width Modulation Technique for an Asymmetrical Multilevel Inverter Topology
In this paper, an asymmetrical Multilevel Inverter (MLI) topology with two different source configurations have been explained. The proposed topology contains 8-unidirectional switches, 1-Bidirectional Switch (BS) and 2-dc sources. Here, BS is connected in common emitter configuration mode thereby r...
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Published in: | 2021 IEEE International Conference on Intelligent Systems, Smart and Green Technologies (ICISSGT) pp. 156 - 161 |
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Main Authors: | , , , , , |
Format: | Conference Proceeding |
Language: | English |
Published: |
IEEE
01-11-2021
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Subjects: | |
Online Access: | Get full text |
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Summary: | In this paper, an asymmetrical Multilevel Inverter (MLI) topology with two different source configurations have been explained. The proposed topology contains 8-unidirectional switches, 1-Bidirectional Switch (BS) and 2-dc sources. Here, BS is connected in common emitter configuration mode thereby requirement of gate driver circuit become only one. The topology is nothing but cascade connection of one H-Bridge inverter and five level T -type inverter. It provides less per unit Total Standing Voltage (TSV) and it is one of the significant factor for cost requirement of semiconductor devices. Basically, the reduction of switch count indicates respective reduction in gate driver circuit, heat sink and protection circuits. The Unipolar Phase Disposition (UPD) Pulse Width Modulation (PWM) technique has been applied to the proposed topology and this technique reduces the number of carrier count as compared with conventional PD technique thereby control complexity further decreases. By taking 1:4 source configuration, it is possible to generate Ll-level output and similarly with 1:2 source configuration, it is possible to generate 7-level output using UPD technique. With step change in Modulation Index (MI) values, the performance of an inverter in both configurations have been explained. Finally, the operation of an inverter with UPD technique has been validated through MATLAB/Simulink platform. |
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DOI: | 10.1109/ICISSGT52025.2021.00041 |