UTBB FD-SOI Variability Characterization Using Programmable Transistor Arrays

• Published in: 2023 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) pp. 1 - 7
• Main Authors: Mahmoud, M. Mounir, Prinzie, J., Belie, A. Adebabay, De Raedemaeker, S., Leroux, P.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 24-07-2023
• Subjects: FD-SOI; Integrated circuits; Performance evaluation; Random processes; Semiconductor device measurement; Silicon-on-insulator; Stacking; Systematics; Transistor Arrays; Variability
• ISSN: 1946-1550
• DOI: 10.1109/IPFA58228.2023.10249085

Intensive CMOS scaling is a significant factor for achieving superior performance. However, this scaling has an enormous negative effect on the circuit reliability, as it increases the impact of variability. The stochastic nature of variability made advanced technologies characterization challenging, as there is a crucial necessity to characterize a significantly large number of devices to have precise characterization. This article presents the variability results of 28-nm ultra-thin body and buried oxide (UTBB) fully depleted silicon on insulator (FD-SOI) technology using our custom-designed programmable transistor arrays: ProArray. The ProArray is a large-scale programmable device arrays chip, that contains about 28,000 devices divided into several arrays. The random process variability was measured and characterized for diverse devices. Moreover, the impact of systematic variability was presented, which provides a promising guide to mitigate the negative impact of variability.