Visconti: multi-VLIW image recognition processor based on configurable processor [obstacle detection applications]

• Published in: Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003 pp. 185 - 188
• Main Authors: Tanabe, J., Taniguchi, Y., Miyamori, T., Miyamoto, Y., Takeda, H., Tarui, M., Nakayama, H., Takeda, N., Maeda, K., Matsui, M.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2003
• Subjects: CMOS technology; Coprocessors; Image recognition; Intelligent control; Intelligent vehicles; Machine vision; Process design; Read only memory; SDRAM; VLIW
• ISBN: 9780780378421; 0780378423
• DOI: 10.1109/CICC.2003.1249387

An 18-GOPS multi-VLIW image recognition processor, "Visconti" (vision based sensing, control, and intelligence), for intelligent vehicle applications is described. Three 3-way VLIW processors are integrated into a single chip with peripheral modules such as an SDRAM controller, video I/Os and a Flash ROM controller. The VLIW processor is designed based on Toshiba's configurable processor known as MeP (media embedded processor) and includes the customized VLIW coprocessor extension which can execute SIMD instructions. Visconti's architecture can exploit multi-grain parallelism, data level, instruction level and task level, effectively for its target applications. The chip is fabricated using 0.13 /spl mu/m CMOS technology and integrates 21 M transistors on a 48.7-mm/sup 2/ die. It operates at 150 MHz in the worst case and consumes 1 W during front observation application using the stereo camera-based vision system at video rate.