Integrated analog filter tuning system design/Integriniu analoginiu filtru savaiminio derinimo sistemos projektavimas
Parameters of integrated analog filters can vary due to temperature change, IC process variation and therefore they should have dedicated tuning circuits that compensate these imperfections. A method is proposed that speeds up switched resistor bank design while taking into account the required tuni...
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Published in: | Science future of Lithuania p. 308 |
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Main Authors: | , , |
Format: | Journal Article |
Language: | English |
Published: |
Vilnius Gediminas Technical University
01-06-2016
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Subjects: | |
Online Access: | Get full text |
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Summary: | Parameters of integrated analog filters can vary due to temperature change, IC process variation and therefore they should have dedicated tuning circuits that compensate these imperfections. A method is proposed that speeds up switched resistor bank design while taking into account the required tuning range and step size. A novel counter structure is used in the tuning circuit that is based on successive approximation approach. The proposed switched resistor design method and tuning circuit are designed in 0.18 µm CMOS technology and verified. Results are compared to existing tuning circuit designs. Keywords: self, auto, tuning system, resistor bank, RC filters, CMOS. Integriniu analoginiu filtru parametrai gali kisti del temperaturos, senejimo ar integriniu grandynu gamybos procesu netolydumo. Todel jiems butina numatyti papildomus grandynus, kurie kompensuotu filtru komponentu pokycius. Darbe siulomas naujas integriniu aktyviuju RC filtru perjungiamu rezistoriu matricu projektavimo metodas, kuris leidzia kompensuoti pasyviu komponentu nuokrypius ir uztikrina filtro praleidziamu dazniu juostos derinima reikiamu zingsniu. Savaiminio derinimo sistemoje remiamasi nauja skaitiklio architektura, kuri naudoja nuosekliosios aproksimacijos paieskos algoritma. Darbe pasiulytas projektavimo metodas tikrinamas projektuojant filtro derinimo sistema, naudojant 0,18 um KMOP integriniu grandynu gamybos technologija ir Cadence Virtuoso programine iranga. Gauti rezultatai palyginami su literaturoje pateiktais derinimo sistemu skaiciavimu rezultatais. Reiksminiai Zodziai: savaiminis, derinimosi sistema, perjungiami rezistoriai, RC filtrai, KMOP. |
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ISSN: | 2029-2341 |
DOI: | 10.3846/mla.2016.935 |