Trusted Performance Modeling of Network-on-Chip Electronics Using Queueing Analysis
To enhance the efficiency of consumer electronics, network-on-chip (NoC) has emerged as a prevalent and efficacious communication paradigm, effectively addressing bandwidth and scalability concerns in high-performance computing environments, thus surpassing the limitations imposed by conventional bu...
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Published in: | IEEE transactions on consumer electronics p. 1 |
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Main Authors: | , , , , |
Format: | Journal Article |
Language: | English |
Published: |
IEEE
12-10-2024
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Subjects: | |
Online Access: | Get full text |
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Summary: | To enhance the efficiency of consumer electronics, network-on-chip (NoC) has emerged as a prevalent and efficacious communication paradigm, effectively addressing bandwidth and scalability concerns in high-performance computing environments, thus surpassing the limitations imposed by conventional bus systems. To evaluate the overall performance and ensure the trusted performance of NoC electronics, the Poisson process is typically employed to model the traffic flow. However, such models often fail to account for the observed self-similarity in traffic, potentially leading to unrealistic performance results. To address this gap, we present a novel queueing network-based analytical model for NoC electronics that incorporates self-similar traffic patterns. Additionally, we analyze and derive new variation rules for the parameters of self-similar traffic following various traffic operations. Results from extensive experiments indicate that the simulation outcomes closely align with the analytical solutions, demonstrating the accuracy and reliability of our proposed model. This model provides a cost-effective and trusted tool for evaluating the performance of NoC electronics, ensuring that performance assessments are both realistic and dependable. |
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ISSN: | 0098-3063 1558-4127 |
DOI: | 10.1109/TCE.2024.3480318 |