Sn whisker evaluations in 3D microbumped structures

Sn whiskering remains a reliability concern in electronic applications. Despite extensive research on growth rates and mitigation strategies, no predictive theory is in place. Literature data are available for Cu/Sn-based films and coatings as well as for board-level and flip-chip solder bumps but d...

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Published in:Microelectronics and reliability Vol. 54; no. 9-10; pp. 1982 - 1987
Main Authors: Vakanas, G.P., Vandecasteele, B., Schaubroek, D., De Messemaeker, J., Willems, G., Ashworth, M.A., Wilcox, G.D., De Wolf, I.
Format: Journal Article Conference Proceeding
Language:English
Published: Kidlington Elsevier Ltd 01-09-2014
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Abstract Sn whiskering remains a reliability concern in electronic applications. Despite extensive research on growth rates and mitigation strategies, no predictive theory is in place. Literature data are available for Cu/Sn-based films and coatings as well as for board-level and flip-chip solder bumps but data are scarce for scaled-down solder volumes and for higher intermetallic-to-solder ratios. The current work investigates whiskers in “isolated geometries” for 3D solder-capped Cu microbumps with >2 orders of magnitude smaller solder volumes compared to state-of-the-art. To the best of the authors’ knowledge, this is the first time Sn whisker growth is reported in isolated solder volumes (e.g. <8μm-side cube). Whiskers propensity was evaluated using JEDEC industrial specifications. The tested structures were: 5/3.5μm-thick Cu/Sn films and 15μm-diameter electroplated solder capping (Sn, SnAg, SnCu) on Cu microbumps (as-plated vs. reflowed). Selected Sn whiskers and “whisker-like” features were analysed and identified experimentally with SEM, EDX and FIB. In the absence of a predictive model, first-order and “what if” calculations based on IMC molar volume and oxide cracking hypotheses were carried out. This approach quantifies “figures of merit” for Sn whisker propensity with (1) different bump-limiting metallization (BLM) cases e.g. Cu, Ni, Co and (2) further microbump scaling. Future research recommendations are outlined to mitigate manufacturing risks by controlling “sit time” between bumping and stacking.
AbstractList Sn whiskering remains a reliability concern in electronic applications. Despite extensive research on growth rates and mitigation strategies, no predictive theory is in place. Literature data are available for Cu/Sn-based films and coatings as well as for board-level and flip-chip solder bumps but data are scarce for scaled-down solder volumes and for higher intermetallic-to-solder ratios. The current work investigates whiskers in "isolated geometries" for 3D solder-capped Cu microbumps with >2 orders of magnitude smaller solder volumes compared to state-of-the-art. To the best of the authors' knowledge, this is the first time Sn whisker growth is reported in isolated solder volumes (e.g. <8 mu m-side cube). Whiskers propensity was evaluated using JEDEC industrial specifications. The tested structures were: 5/3.5 mu m-thick Cu/Sn films and 15 mu m-diameter electroplated solder capping (Sn, SnAg, SnCu) on Cu microbumps (as-plated vs. reflowed). Selected Sn whiskers and "whisker-like" features were analysed and identified experimentally with SEM, EDX and FIB. In the absence of a predictive model, first-order and "what if" calculations based on IMC molar volume and oxide cracking hypotheses were carried out. This approach quantifies "figures of merit" for Sn whisker propensity with (1) different bump-limiting metallization (BLM) cases e.g. Cu, Ni, Co and (2) further microbump scaling. Future research recommendations are outlined to mitigate manufacturing risks by controlling "sit time" between bumping and stacking.
Sn whiskering remains a reliability concern in electronic applications. Despite extensive research on growth rates and mitigation strategies, no predictive theory is in place. Literature data are available for Cu/Sn-based films and coatings as well as for board-level and flip-chip solder bumps but data are scarce for scaled-down solder volumes and for higher intermetallic-to-solder ratios. The current work investigates whiskers in “isolated geometries” for 3D solder-capped Cu microbumps with >2 orders of magnitude smaller solder volumes compared to state-of-the-art. To the best of the authors’ knowledge, this is the first time Sn whisker growth is reported in isolated solder volumes (e.g. <8μm-side cube). Whiskers propensity was evaluated using JEDEC industrial specifications. The tested structures were: 5/3.5μm-thick Cu/Sn films and 15μm-diameter electroplated solder capping (Sn, SnAg, SnCu) on Cu microbumps (as-plated vs. reflowed). Selected Sn whiskers and “whisker-like” features were analysed and identified experimentally with SEM, EDX and FIB. In the absence of a predictive model, first-order and “what if” calculations based on IMC molar volume and oxide cracking hypotheses were carried out. This approach quantifies “figures of merit” for Sn whisker propensity with (1) different bump-limiting metallization (BLM) cases e.g. Cu, Ni, Co and (2) further microbump scaling. Future research recommendations are outlined to mitigate manufacturing risks by controlling “sit time” between bumping and stacking.
Author Willems, G.
De Messemaeker, J.
Wilcox, G.D.
Schaubroek, D.
De Wolf, I.
Vakanas, G.P.
Vandecasteele, B.
Ashworth, M.A.
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Cites_doi 10.1109/TEPM.2006.890645
10.1103/PhysRevB.49.2030
10.1109/TEPM.2010.2043847
10.1557/JMR.2008.0351
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10.1007/s11837-011-0178-z
10.1007/s11664-007-0284-4
10.1007/s11837-010-0105-8
10.1016/j.actamat.2010.01.027
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Issue 9-10
Keywords Intermetallics
Lead-free solders
Microbumping
3D/TSV interconnects
Whiskers
State of the art
Growth rate
Stacking
Flip-chip
Cracking
Metallizing
Coatings
Whisker
Integrated circuit bonding
Microelectronic fabrication
Solder bump
Thick film
First order
Electronic packaging
Soldered joint
Testing equipment
Miniaturization
Copper
Reliability
Static induction transistor
Computer aid
Figure of merit
Reflow soldering
Language English
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Snippet Sn whiskering remains a reliability concern in electronic applications. Despite extensive research on growth rates and mitigation strategies, no predictive...
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StartPage 1982
SubjectTerms 3D/TSV interconnects
Applied sciences
Copper
Design. Technologies. Operation analysis. Testing
Electronics
Exact sciences and technology
Integrated circuits
Intermetallics
Lead-free solders
Mathematical models
Microbumping
Microelectronic fabrication (materials and surfaces technology)
Risk management
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Solders
Stacking
Testing, measurement, noise and reliability
Three dimensional
Tin
Transistors
Whiskers
Title Sn whisker evaluations in 3D microbumped structures
URI https://dx.doi.org/10.1016/j.microrel.2014.07.110
https://search.proquest.com/docview/1651397022
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