MOSFET hot-carrier reliability improvement by forward-body bias

• Published in: IEEE electron device letters Vol. 27; no. 7; pp. 605 - 608
• Main Authors: Hokazono, A., Balasubramanian, S., Ishimaru, K., Ishiuchi, H., Chenming Hu, Tsu-Jae King Liu
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01-07-2006; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Active control; Applied sciences; Bias; CMOS; CMOS technology; Degradation; Design. Technologies. Operation analysis. Testing; Devices; Electronics; Exact sciences and technology; Forward-body bias; Gates; Hot carriers; hot-carrier reliability; Integrated circuits; Mathematical models; MOS devices; MOSFET; MOSFET circuits; MOSFETs; Research and development; reverse-body bias; Scalability; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Semiconductors; substrate bias; Substrates; Threshold voltage; Transistors; Voltage control; Performance evaluation; Voltage threshold; Forward-body bias; hot-carrier reliability; MOSFET; reverse-body bias; Scalability; substrate bias; Two dimensional model; Voltage control; Complementary MOS technology; Carrier lifetime; Hot carrier; Miniaturization; Reliability
• ISSN: 0741-3106; 1558-0563
• DOI: 10.1109/LED.2006.877306

Active threshold voltage V/sub TH/ control via well-substrate biasing can be utilized to satisfy International Roadmap for Semiconductors performance and standby power requirements for CMOS technology beyond the hp65-nm node. In this letter, the impact of substrate bias V/sub SUB/ on hot-carrier reliability is presented. The impact varies with the gate length and body effect factor. These findings are explained, and the effects of future scaling are discussed using a quasi-two-dimensional model. Significant and important improvement in hot-carrier lifetime with forward-bias V/sub SUB/ can be expected for deeply scaled CMOS devices, making it an attractive method for extending the scalability of bulk-Si transistor technology.