Study of Weight Quantization Associations over a Weight Range for Application in Memristor Devices
The development of hardware-based cognitive computing systems critically hinges upon the integration of memristor devices capable of versatile weight expression across a spectrum of resistance levels while preserving consistent electrical properties. This investigation aims to explore the practical...
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Published in: | Micromachines (Basel) Vol. 15; no. 10; p. 1258 |
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Abstract | The development of hardware-based cognitive computing systems critically hinges upon the integration of memristor devices capable of versatile weight expression across a spectrum of resistance levels while preserving consistent electrical properties. This investigation aims to explore the practical implementation of a digit recognition system utilizing memristor devices with minimized weighting levels. Through the process of weight quantization for digits represented by 25 or 49 input signals, the study endeavors to ascertain the feasibility of digit recognition via neural network computation. The integration of memristor devices into the system architecture is poised to streamline the representation of the resistors required for weight expression, thereby facilitating the realization of neural-network-based cognitive systems. To minimize the information corruption in the system caused by weight quantization, we introduce the concept of "weight range" in this work. The weight range is the range between the maximum and minimum values of the weights in the neural network. We found that this has a direct impact on weight quantization, which reduces the number of digits represented by a weight below a certain level. This was found to help maintain the information integrity of the entire system despite the reduction in weight levels. Moreover, to validate the efficacy of the proposed methodology, quantized weights are systematically applied to an array of double-layer neural networks. This validation process involves the construction of cross-point array circuits with dimensions of 25 × 10 and 10 × 10, followed by a meticulous examination of the resultant changes in the recognition rate of randomly generated numbers through device simulations. Such endeavors contribute to advancing the understanding and practical implementation of hardware-based cognitive computing systems leveraging memristor devices and weight quantization techniques. |
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AbstractList | The development of hardware-based cognitive computing systems critically hinges upon the integration of memristor devices capable of versatile weight expression across a spectrum of resistance levels while preserving consistent electrical properties. This investigation aims to explore the practical implementation of a digit recognition system utilizing memristor devices with minimized weighting levels. Through the process of weight quantization for digits represented by 25 or 49 input signals, the study endeavors to ascertain the feasibility of digit recognition via neural network computation. The integration of memristor devices into the system architecture is poised to streamline the representation of the resistors required for weight expression, thereby facilitating the realization of neural-network-based cognitive systems. To minimize the information corruption in the system caused by weight quantization, we introduce the concept of "weight range" in this work. The weight range is the range between the maximum and minimum values of the weights in the neural network. We found that this has a direct impact on weight quantization, which reduces the number of digits represented by a weight below a certain level. This was found to help maintain the information integrity of the entire system despite the reduction in weight levels. Moreover, to validate the efficacy of the proposed methodology, quantized weights are systematically applied to an array of double-layer neural networks. This validation process involves the construction of cross-point array circuits with dimensions of 25 × 10 and 10 × 10, followed by a meticulous examination of the resultant changes in the recognition rate of randomly generated numbers through device simulations. Such endeavors contribute to advancing the understanding and practical implementation of hardware-based cognitive computing systems leveraging memristor devices and weight quantization techniques. The development of hardware-based cognitive computing systems critically hinges upon the integration of memristor devices capable of versatile weight expression across a spectrum of resistance levels while preserving consistent electrical properties. This investigation aims to explore the practical implementation of a digit recognition system utilizing memristor devices with minimized weighting levels. Through the process of weight quantization for digits represented by 25 or 49 input signals, the study endeavors to ascertain the feasibility of digit recognition via neural network computation. The integration of memristor devices into the system architecture is poised to streamline the representation of the resistors required for weight expression, thereby facilitating the realization of neural-network-based cognitive systems. To minimize the information corruption in the system caused by weight quantization, we introduce the concept of "weight range" in this work. The weight range is the range between the maximum and minimum values of the weights in the neural network. We found that this has a direct impact on weight quantization, which reduces the number of digits represented by a weight below a certain level. This was found to help maintain the information integrity of the entire system despite the reduction in weight levels. Moreover, to validate the efficacy of the proposed methodology, quantized weights are systematically applied to an array of double-layer neural networks. This validation process involves the construction of cross-point array circuits with dimensions of 25 × 10 and 10 × 10, followed by a meticulous examination of the resultant changes in the recognition rate of randomly generated numbers through device simulations. Such endeavors contribute to advancing the understanding and practical implementation of hardware-based cognitive computing systems leveraging memristor devices and weight quantization techniques.The development of hardware-based cognitive computing systems critically hinges upon the integration of memristor devices capable of versatile weight expression across a spectrum of resistance levels while preserving consistent electrical properties. This investigation aims to explore the practical implementation of a digit recognition system utilizing memristor devices with minimized weighting levels. Through the process of weight quantization for digits represented by 25 or 49 input signals, the study endeavors to ascertain the feasibility of digit recognition via neural network computation. The integration of memristor devices into the system architecture is poised to streamline the representation of the resistors required for weight expression, thereby facilitating the realization of neural-network-based cognitive systems. To minimize the information corruption in the system caused by weight quantization, we introduce the concept of "weight range" in this work. The weight range is the range between the maximum and minimum values of the weights in the neural network. We found that this has a direct impact on weight quantization, which reduces the number of digits represented by a weight below a certain level. This was found to help maintain the information integrity of the entire system despite the reduction in weight levels. Moreover, to validate the efficacy of the proposed methodology, quantized weights are systematically applied to an array of double-layer neural networks. This validation process involves the construction of cross-point array circuits with dimensions of 25 × 10 and 10 × 10, followed by a meticulous examination of the resultant changes in the recognition rate of randomly generated numbers through device simulations. Such endeavors contribute to advancing the understanding and practical implementation of hardware-based cognitive computing systems leveraging memristor devices and weight quantization techniques. |
Audience | Academic |
Author | Lee, Shinbuhm Choi, Rock-Hyun Lee, Hyeon-Jun Noh, Hee Yeon Lee, Myoung-Jae Koo, Gyogwon Lee, Sanghan Lee, Hyunki Kim, Yerim |
AuthorAffiliation | 4 Department of Physics and Chemistry, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu 42988, Republic of Korea 3 Institute of Next-Generation Semiconductor Convergence Technology (INST), Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu 42988, Republic of Korea 1 Division of Nanotechnology, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu 42988, Republic of Korea 2 Division of Intelligent Robot, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu 42988, Republic of Korea |
AuthorAffiliation_xml | – name: 1 Division of Nanotechnology, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu 42988, Republic of Korea – name: 4 Department of Physics and Chemistry, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu 42988, Republic of Korea – name: 2 Division of Intelligent Robot, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu 42988, Republic of Korea – name: 3 Institute of Next-Generation Semiconductor Convergence Technology (INST), Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu 42988, Republic of Korea |
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Cites_doi | 10.1063/5.0177175 10.2307/2407137 10.3389/fnins.2019.00593 10.1109/JPROC.2017.2761740 10.1109/ACCESS.2018.2839106 10.1021/acsami.1c01076 10.1109/CVPR.2019.00748 10.1016/j.apsusc.2023.156620 10.3389/fnins.2021.717222 10.1016/j.mtnano.2024.100491 10.1109/LED.2020.2986478 10.1038/s41598-022-24212-7 10.1016/j.ijfatigue.2023.108007 10.1109/5.58356 10.1109/MWSCAS.2017.8052950 10.1109/MDAT.2023.3241116 10.1038/nature14441 10.1007/3-540-59497-3 10.1038/323533a0 10.1021/acsami.8b09046 10.1016/j.neunet.2014.09.003 10.1039/D3NR02591H 10.1038/nmat3070 10.1038/s41586-020-1942-4 10.1109/18.720541 10.1609/aaai.v31i1.10862 10.3390/cryst9020075 10.1201/9781003162810-13 10.1038/s41928-020-0397-9 |
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SubjectTerms | Accuracy Arrays Artificial intelligence Back propagation Computation Devices Digits Electric properties Electrical properties Expected values Feasibility studies Hardware memristor Memristors neural network Neural networks Recognition Software Variables weight quantization |
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Title | Study of Weight Quantization Associations over a Weight Range for Application in Memristor Devices |
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