Analysis and Design of a Multicell Topology Based on Three-Phase/Single-Phase Current-Source Cells

• Published in: IEEE transactions on power electronics Vol. 31; no. 9; pp. 6122 - 6133
• Main Authors: Melin, Pedro E., Rohten, Jaime A., Espinoza, Jose R., Baier, Carlos R., Espinosa, Eduardo E., Munoz, Javier A., Riedemann, Javier A.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01-09-2016; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: cascaded h-bridge based on current-source inverters; Converters; current-source converters; Design analysis; Diodes; Electric currents; Electric potential; Harmonic analysis; Inductors; Inverters; Mathematical models; Passive components; Power harmonic filters; Power supply; Rectifiers; Switching; Topology; Voltage; Voltage control; Waveforms; Cascaded H-bridge based on current-source inverters; current-source converters
• ISSN: 0885-8993; 1941-0107
• DOI: 10.1109/TPEL.2015.2502185

This work proposes a multicell topology based on current-source cells in order to inherit the advantages of current-source topologies such as reduced load dv/dt voltage and natural bidirectional power flow and to adopt a similar behavior of the multicell topology based on a voltage source converter such as voltage controlled behavior where n C cells are connected in series to feed one load phase. In order to check the technical feasibility and performance of the proposed topology, a mathematical model is introduced and studied and key design guidelines of passive components are defined. The analysis shows the possibility of using components with a lower voltage rating than that of the classic multilevel current source topologies and allows the use of low switching frequencies in both rectifier and inverter stages while at the same time obtaining a high-quality waveform in both load voltage and converter input currents. A case of example is used to corroborate the theoretical analysis and the component design methodology, as well as the performance of the topology using a low-power prototype.