Short-Channel Performance Improvement by Raised Source/Drain Extensions With Thin Spacers in Trigate Silicon Nanowire MOSFETs

• Published in: IEEE electron device letters Vol. 32; no. 3; pp. 273 - 275
• Main Authors: Saitoh, M, Nakabayashi, Y, Uchida, K, Numata, T
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01-03-2011; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Capacitance; Cross-disciplinary physics: materials science; rheology; Drain-induced barrier lowering (DIBL); Drains; Electronics; Epitaxial growth; Exact sciences and technology; FinFETs; Gates; Logic gates; Materials science; Nanocomposites; Nanomaterials; Nanoscale materials and structures: fabrication and characterization; Nanostructure; nanowire transistor; Nanowires; parasitic capacitance; parasitic resistance; Physics; Quantum wires; raised source/drain (S/D); Resistance; Semiconductor devices; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Silicon; Spacers; Transistors; trigate; Performance evaluation; MOSFET; nanowire transistor; trigate; Spurious capacity; Short channel; raised source/drain (S/D); Spacer; Parasitic resistance; Silicon; Drain-induced barrier lowering (DIBL); Nanowires; DIBL effect; parasitic capacitance
• ISSN: 0741-3106; 1558-0563
• DOI: 10.1109/LED.2010.2101043

We investigate the short-channel performance of trigate silicon nanowire transistors. Drain-induced barrier lowering at a gate length of 25 nm is strongly suppressed by reducing the nanowire width (W NW ) down to 10 nm. We found that the parasitic resistance (R SD ) of nanowire transistors is dominated by nanowire-shaped source/drain (S/D) regions under the gate spacer whose resistivity is higher than that in wider regions. We succeeded in significant reduction by raised S/D with thin gate spacer whose width is 10 nm. Although the parasitic capacitance (C para ) increases by spacer thinning, C para increase is much smaller than R SD reduction, and great performance improvement is obtained for a W NW of less than 15 nm.