Observation of Side-Gating Effect in AlGaN/GaN Heterostructure Field Effect Transistors
The side-gating effect was demonstrated in AlGaN/GaN heterostructure field effect transistors (HFETs) for the first time. Using 10-μm-thick i-GaN buffer layers, drain currents decreased significantly with the application of a negative bias on a side gate 8 μm away from the FET. The transient respons...
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Published in: | Japanese Journal of Applied Physics Vol. 52; no. 8; pp. 08JN28 - 08JN28-5 |
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Abstract | The side-gating effect was demonstrated in AlGaN/GaN heterostructure field effect transistors (HFETs) for the first time. Using 10-μm-thick i-GaN buffer layers, drain currents decreased significantly with the application of a negative bias on a side gate 8 μm away from the FET. The transient responses with LED illumination demonstrated half-recovery condition that can be interpreted as a negative-charge redistribution through a hole emission from traps. The application of a positive side-gate bias confirmed the half-recovery mechanism. From the temperature variation measurements, the trap energy level is estimated to be 0.76 eV from the valence band with a hole capture cross section of approximately $4\times 10^{-16}$ cm 2 . All these results indicate that the side-gating effect is caused by hole traps in the i-GaN layer, which is in accord with the Shockley--Read--Hall model of deep traps. |
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AbstractList | The side-gating effect was demonstrated in AlGaN/GaN heterostructure field effect transistors (HFETs) for the first time. Using 10- mu m-thick i-GaN buffer layers, drain currents decreased significantly with the application of a negative bias on a side gate 8 mu m away from the FET. The transient responses with LED illumination demonstrated half-recovery condition that can be interpreted as a negative-charge redistribution through a hole emission from traps. The application of a positive side-gate bias confirmed the half-recovery mechanism. From the temperature variation measurements, the trap energy level is estimated to be 0.76 eV from the valence band with a hole capture cross section of approximately 4x10 super(-16) cm super(2). All these results indicate that the side-gating effect is caused by hole traps in the i-GaN layer, which is in accord with the Shockley-Read-Hall model of deep traps. The side-gating effect was demonstrated in AlGaN/GaN heterostructure field effect transistors (HFETs) for the first time. Using 10-μm-thick i-GaN buffer layers, drain currents decreased significantly with the application of a negative bias on a side gate 8 μm away from the FET. The transient responses with LED illumination demonstrated half-recovery condition that can be interpreted as a negative-charge redistribution through a hole emission from traps. The application of a positive side-gate bias confirmed the half-recovery mechanism. From the temperature variation measurements, the trap energy level is estimated to be 0.76 eV from the valence band with a hole capture cross section of approximately $4\times 10^{-16}$ cm 2 . All these results indicate that the side-gating effect is caused by hole traps in the i-GaN layer, which is in accord with the Shockley--Read--Hall model of deep traps. The side-gating effect was demonstrated in AlGaN/GaN heterostructure field effect transistors (HFETs) for the first time. Using 10-µm-thick i-GaN buffer layers, drain currents decreased significantly with the application of a negative bias on a side gate 8 µm away from the FET. The transient responses with LED illumination demonstrated half-recovery condition that can be interpreted as a negative-charge redistribution through a hole emission from traps. The application of a positive side-gate bias confirmed the half-recovery mechanism. From the temperature variation measurements, the trap energy level is estimated to be 0.76 eV from the valence band with a hole capture cross section of approximately 4×10 -16 cm 2 . All these results indicate that the side-gating effect is caused by hole traps in the i-GaN layer, which is in accord with the Shockley–Read–Hall model of deep traps. |
Author | Kio, Yusuke Ikawa, Yusuke Ohno, Yasuo Ao, Jin-Ping |
Author_xml | – sequence: 1 givenname: Yasuo surname: Ohno fullname: Ohno, Yasuo organization: The University of Tokushima, Tokushima 770-8506, Japan – sequence: 2 givenname: Yusuke surname: Kio fullname: Kio, Yusuke organization: The University of Tokushima, Tokushima 770-8506, Japan – sequence: 3 givenname: Yusuke surname: Ikawa fullname: Ikawa, Yusuke organization: The University of Tokushima, Tokushima 770-8506, Japan – sequence: 4 givenname: Jin-Ping surname: Ao fullname: Ao, Jin-Ping organization: The University of Tokushima, Tokushima 770-8506, Japan |
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Cites_doi | 10.1063/1.343466 10.1143/JJAP.47.2103 10.1109/16.57132 10.1587/transele.E93.C.1218 10.1103/PhysRev.87.835 |
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Notes | (Color online) Epitaxial layer structures used in experiments. (a) Sample (A) and (b) sample (B). (Color online) Schematic cross section of the device structure for the side-gating effect measurement. (Color online) Pattern layout of the side-gating effect measurement devices. (Color online) $V_{\text{D}}$--$I_{\text{D}}$ characteristics at $V_{\text{G}} = 0$ V under side-gate bias application. (a) Sample (A) and (b) sample (B). (Color online) $I_{\text{D}}$ and $I_{\text{SG}}$ versus $V_{\text{SG}}$ characteristics of the sample (B). $V_{\text{G}} = 0$ V and $V_{\text{D}} = 4$ V. (Color online) Drain current responses by side-gate bias change at $V_{\text{G}} = 0$ V and $V_{\text{D}} = 1$ V. (a) Sample (A) and (b) sample (B). Black lines are those measured in the dark. Red dashed lines are the drain current with LED lights. (Color online) Drain current responses of sample (B) at different temperatures. $V_{\text{G}} = 0$ V, $V_{\text{D}} = 1$ V, and $V_{\text{SG}}$ was varied from 0 to $-20$ V. (Color online) One-dimensional simulation of n--i--n structure. (a) Simulation structure, where $N_{\text{SA}} = 1\times 10^{17}$ cm -3 , $N_{\text{DD}} = 2\times 10^{17}$ cm -3 , $\sigma_{\text{N}} = \sigma_{\text{P}} = 1\times 10^{-12}$ cm 2 , $E_{\text{T}} = 2.4$ eV from $E_{\text{C}}$. (b) Potential profiles during the stress-on process ($V_{\text{ANODE}} = 0\rightarrow 50$ V, corresponding to $V_{\text{SG}} = 0\rightarrow -50$ V). (c) Recovery process ($V_{\text{ANODE}} = 50\rightarrow 0$ V, corresponding to $V_{\text{SG}} = -50\rightarrow 0$ V). (d) Transients of the conduction band energy at the sample center indicated by the vertical lines in (b) and (c). (Color online) Drain current responses of sample (B) for both positive- and negative-side-gate-bias cases. The side-gate biases were applied from 60 to 2060 s. (Color online) Model explaining the trap charge variation in the side-gating effect. (a) Stress-on case. (b) Recovery case. ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 23 |
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References | Y. Ikawa, Y. Yuasa, C.-Y. Hu, J.-P. Ao, and Y. Ohno: IEICE Trans. Electron. E93-C (2010) 1218. R. N. Hall: Proc. IEE, Part B 106 (1959) 923. M. Okada, H. Ito, J.-P. Ao, and Y. Ohno: Jpn. J. Appl. Phys. 47 (2008) 2103. N. Goto, Y. Ohno, and H. Yano: IEEE Trans. Electron Devices 37 (1990) 1821. Y. Ohno and N. Goto: J. Appl. Phys. 66 (1989) 1217. Y. Kio, T. Hosokawa, Y. Ikawa, J.-P. Ao, and Y. Ohno: IWN2012, MoP-ED-10. W. Shockley and W. T. Read: Phys. Rev. 87 (1952) 835. 2010; E93-C 1952; 87 2008; 47 1990; 37 1989; 66 1959; 106 |
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Snippet | The side-gating effect was demonstrated in AlGaN/GaN heterostructure field effect transistors (HFETs) for the first time. Using 10-μm-thick i-GaN buffer... The side-gating effect was demonstrated in AlGaN/GaN heterostructure field effect transistors (HFETs) for the first time. Using 10-µm-thick i-GaN buffer... The side-gating effect was demonstrated in AlGaN/GaN heterostructure field effect transistors (HFETs) for the first time. Using 10- mu m-thick i-GaN buffer... |
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SubjectTerms | Aluminum gallium nitrides Bias Depth indicators Drains Field effect transistors Gallium nitrides Heterostructures Illumination Semiconductor devices |
Title | Observation of Side-Gating Effect in AlGaN/GaN Heterostructure Field Effect Transistors |
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