Expression equivalence checking using interval analysis

• Published in: IEEE transactions on very large scale integration (VLSI) systems Vol. 14; no. 8; pp. 830 - 842
• Main Authors: Ghodrat, M.A., Givargis, T., Nicolau, A.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01-08-2006; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Application software; Arithmetic; Computer programs; Computer science; Descriptions; Digital computers; Embedded computing; Equivalence; Expression equivalence; Formal verification; Hardware; High level languages; interval analysis; Intervals; mutual exclusion; Software; Software systems; Space technology; Studies; Very large scale integration; VLIW
• ISSN: 1063-8210; 1557-9999
• DOI: 10.1109/TVLSI.2006.878471

Arithmetic expressions are the fundamental building blocks of hardware and software systems. An important problem in computational theory is to decide if two arithmetic expressions are equivalent. However, the general problem of equivalence checking, in digital computers, belongs to the NP Hard class of problems. Moreover, existing general techniques for solving this decision problem are applicable to very simple expressions and impractical when applied to more complex expressions found in programs written in high-level languages. In this paper, we propose a method for solving the arithmetic expression equivalence problem using partial evaluation. In particular, our technique is specifically designed to solve the problem of equivalence checking of arithmetic expressions obtained from high-level language descriptions of hardware/software systems. In our method, we use interval analysis to substantially prune the domain space of arithmetic expressions and limit the evaluation effort to a sufficiently limited set of subspaces. Our results show that the proposed method is fast enough to be of use in practice