Room Temperature Logic Inverter on Epitaxial Graphene-on-Silicon Device

• Published in: Japanese Journal of Applied Physics Vol. 50; no. 7; pp. 070113 - 070113-4
• Main Authors: El Moutaouakil, Amine, Kang, Hyun-Chul, Handa, Hiroyuki, Fukidome, Hirokazu, Suemitsu, Tetsuya, Sano, Eiichi, Suemitsu, Maki, Otsuji, Taiichi
• Format: Journal Article
• Language: English
• Published: The Japan Society of Applied Physics 01-07-2011
• ISSN: 0021-4922; 1347-4065
• DOI: 10.1143/JJAP.50.070113

The inverting operation of a logic inverter, using two back-gate epitaxial graphene-on-silicon field-effect transistors (GOSFETs), is demonstrated at room temperature. Thanks to the asymmetric ambipolarity of the fabricated GOSFETs, owing to the undesirable back-gate leakage, the on/off state current has been dramatically reduced. This results in a well matched input/output voltage levels for a wide $V_{\text{DD}}$ range from more than 1 V down to 0.5 V. The inverting operation of the device is obtained at as low $V_{\text{DD}}$ bias as 0.5 V. Voltage gains higher than the unity are also obtained. The experimental results are in good agreement with the simulation results made for the case of asymmetric ambipolar transistors.