First demonstration of device-quality symmetric N-MOS and P-MOS capacitors on p-type and n-type crystalline Ge substrates

• Published in: Microelectronic engineering Vol. 109; pp. 370 - 373
• Main Authors: Lucovsky, G., Kim, J.W., Nordlund, D.
• Format: Journal Article
• Language: English
• Published: Elsevier B.V 01-09-2013
• Subjects: Crystal structure; C–V and J–V device measurements; Density; Dielectrics; Gates; Germanium; Nanomaterials; Nanostructure; Ng-HfO2 and TiO2; Non-crystalline Hf Si oxynitrides; Semiconductors; Titanium dioxide; Vacated O-site defects; X-ray absorption spectroscopy (XAS); X-ray photoemission spectroscopy (XPS); Non-crystalline Hf Si oxynitrides; X-ray absorption spectroscopy (XAS); Ng-HfO2 and TiO2; X-ray photoemission spectroscopy (XPS); C–V and J–V device measurements; Vacated O-site defects
• ISSN: 0167-9317; 1873-5568
• DOI: 10.1016/j.mee.2013.03.031

•Ge interface nitride passivation.•Si passivation layer thickness.•SiON surface on Si passivation layer.•Anneal to eliminate Ge–N bonds.•Symmetric NMOS and CMOS capacitors.
Three significant issues with respect to the ultimate scaling limitations of CMOS devices are (i) the channel or transport material, (ii) high-κ compatible gate stacks: (a) the interface with the semiconductor substrate; (b) the high dielectrics, and (c) the gate metal, and (iii) the topological structure, planar, nano-tube, or in, etc. Two of these are high-lighted, focusing on (i) crystalline Ge, and transition metal dielectrics including specifically non-crystalline Hf Si oxynitrides, and nano-grain (a) ultra-thin 2nm thick HfO2 and TiO2. The research has demonstrated shallow trap interfacial slow trap densities of ∼5×1010cm−2, no detectable negative bulk fixed charges, and symmetric N- and P-MOCAPS in planar geometries. EOT values <0.5nm were obtained for low-leakage current for N-MOSCAPS with ng-TiO2 in contact with plasma processed c-Ge substrates.