Interface and electrical properties of La-silicate for direct contact of high- k with silicon

• Published in: Solid-state electronics Vol. 54; no. 7; pp. 715 - 719
• Main Authors: Kakushima, K., Tachi, K., Adachi, M., Okamoto, K., Sato, S., Song, J., Kawanago, T., Ahmet, P., Tsutsui, K., Sugii, N., Hattori, T., Iwai, H.
• Format: Journal Article
• Language: English
• Published: Kidlington Elsevier Ltd 01-07-2010; Elsevier
• Subjects: Annealing; Applied sciences; Contact; Degradation; Diffusion; Effective mobility; Electric contacts; Electronics; Exact sciences and technology; Forming; Gates; High- k gate dielectric; Rare earth oxide; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Silicate; Silicon substrates; Transistors; X-ray photoelectron spectroscopy; Rare earth oxide; Silicate; X-ray photoelectron spectroscopy; High- k gate dielectric; Effective mobility; Interfacial layer; Voltage threshold; Lanthanide; Annealing; Transistor gate; Transistor; IV-VI compound; Coulomb scattering; Lanthanum oxide; High-k gate dielectric; Interface properties; Flat band voltage; Silicon oxides; High k dielectric; Silicon; Defect formation; Electrical characteristic; Damaging; X-ray photoelectron spectra
• ISSN: 0038-1101; 1879-2405
• DOI: 10.1016/j.sse.2010.03.005

Chemical bonding states and electrical characteristics of a La-silicate formed as a compositional transition layer at La
2O
3/Si interface has been examined. A direct contact of a high-
k gate dielectric with Si substrate has been achieved without forming SiO
2-based interfacial layer by forming a compositionally graded La-silicate layer, which is advantageous for equivalent oxide thickness (EOT) scaling. A transistor operation with an EOT of 0.48
nm has been demonstrated with low temperature annealing, however a degradation of effective mobility (
μ
eff) has been observed. A high
μ
eff of 300
cm
2/V
s with relatively low interfacial state density (
D
it) of 10
11
cm
−2/eV can be achieved when annealed at 500
°C, indicating fairly nice interface properties of silicate/Si substrate. Mobility analysis has revealed an additional Coulomb scattering below an EOT of 1.2
nm, which is in good agreement with the negative shifts in threshold and flatband voltages. Moreover, increase in
D
it and subthreshold slope have been observed while decreasing the EOT, suggesting the influence of metal atoms diffused from the gate electrode. A mobility degradation model is proposed using metal induced defects generation.