W -Band Amplifiers With 6-dB Noise Figure and Milliwatt-Level 170-200-GHz Doublers in 45-nm CMOS
This paper presents low-noise -band amplifiers and milliwatt-level 170-200-GHz output doublers in 45-nm semiconductor-on-insulator (SOI) CMOS technology. The transistors are modeled using R/C extraction and full electromagnetic modeling. The measured of a 30 1- transistor is 200-210 GHz at a bias cu...
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Published in: | IEEE transactions on microwave theory and techniques Vol. 60; no. 3; pp. 692 - 701 |
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Main Authors: | , , , |
Format: | Journal Article |
Language: | English |
Published: |
IEEE
01-03-2012
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Subjects: | |
Online Access: | Get full text |
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Summary: | This paper presents low-noise -band amplifiers and milliwatt-level 170-200-GHz output doublers in 45-nm semiconductor-on-insulator (SOI) CMOS technology. The transistors are modeled using R/C extraction and full electromagnetic modeling. The measured of a 30 1- transistor is 200-210 GHz at a bias current of 0.3-0.5 . A three-stage -band amplifier shows a record noise figure of 6.0 dB and a saturated output power of 7.5-8.0 dBm with a power-added efficiency of 9%, all at 95 GHz. The -band balanced doubler results in an output power of 1 mW at 180 GHz. A -band amplifier/ -band doubler chip is also demonstrated, with a peak output power of 0.5-1 mW at 170-195 GHz and a conversion gain from to . This paper shows that 45-nm SOI CMOS, built for digital and mixed-signal applications, results in state-of-the-art performance at - and -band. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 0018-9480 1557-9670 |
DOI: | 10.1109/TMTT.2011.2165964 |