Impact of High-Level-Synthesis on Reliability of Artificial Neural Network Hardware Accelerators

• Published in: IEEE transactions on nuclear science Vol. 71; no. 4; p. 1
• Main Authors: Traiola, Marcello, Dos Santos, Fernando Fernandes, Rech, Paolo, Cazzaniga, Carlo, Sentieys, Olivier, Kritikakou, Angeliki
• Format: Journal Article
• Language: English
• Published: New York IEEE 01-04-2024; The Institute of Electrical and Electronics Engineers, Inc. (IEEE); Institute of Electrical and Electronics Engineers
• Subjects: Accelerators; Artificial Intelligence; Artificial neural networks; Circuit faults; Computer Science; Design; Embedded Systems; Error correction; Field programmable gate arrays; Hardware; Hardware acceleration; Hardware Architecture; High level synthesis; Integrated circuit reliability; Neural networks; Neurons; Neutrons; Parameters; Reliability; Reliability analysis; Reliability engineering; Safety critical; System reliability; Neural Networks; Radiation testing; FPGA - field-Programmable gate array; Reliability; High-Level Synthesis HLS
• ISSN: 0018-9499; 1558-1578
• DOI: 10.1109/TNS.2024.3377596

Dedicated hardware is required to efficiently execute the highly resource-demanding modern Artificial Neural Networks (ANNs). The high complexity of ANNs systems has motivated the use of High-Level Synthesis (HLS) tools, which increase design abstraction. The higher abstraction reduces the implementation of FPGA hardware details visible to the designer, making an accurate reliability evaluation challenging. When ANN hardware accelerators are used in safety-critical systems, reliability becomes paramount, and in order to have a realistic reliability evaluation, physical fault injection, such as beam testing, is mandatory. Existing reliability analysis approaches focus on specific ANN hardware accelerator designs, but when HLS tools are used, the tool flow and design decisions can impact reliability. Therefore, we evaluate the error rate of ANN hardware accelerators generated by HLS tools under high-energy neutrons and explore the impact of HLS parameters on reliability. Our results show that by tweaking hardware parameters, such as the reuse of resources, can increase the error rate linearly. Furthermore, the generated ANN hardware accelerator with the best tradeoff of area and execution cycles can deliver 15× more correct executions than the least optimized one, despite its increased error rate.