Sub- \hbox\mu\hbox Reset Current of Nickel Oxide Resistive Memory Through Control of Filamentary Conductance by Current Limit of MOSFET

• Published in: IEEE transactions on electron devices Vol. 55; no. 5; pp. 1185 - 1191
• Main Authors: Sato, Yoshihiro, Tsunoda, Koji, Kinoshita, Kentaro, Noshiro, Hideyuki, Aoki, Masaki, Sugiyama, Yoshihiro
• Format: Journal Article
• Language: English
• Published: IEEE 01-05-2008
• Subjects: Filamentary conductance; Logic gates; memory circuit; Nonvolatile memory; Random access memory; Resistance; resistive memory; resistive random access memory (ReRAM); Switches; Switching circuits; Transistors; memory circuit; resistive random access memory (ReRAM); Filamentary conductance; resistive memory
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2008.919385

Resistive random access memory consisting of NiO resistive memories and control transistors was fabricated with 0.18-mum CMOS technology. An initial forming voltage as low as 2 V was achieved with thin NiO film, and a reset current lower than 100 muA was realized by using the current limit of a selected cell transistor in the set process (1T-1R). The current level was determined by its gate voltage, resulting in the control of electrical resistance of the filamentary conductive paths in the low resistive state. Furthermore, a large voltage increase in the reset operation, which may cause an undesirable set operation, was also suppressed by a voltage-clamp transistor connected to the 1T-1R cell in series. On the basis of these proposed switching schemes, the stable pulse operation was demonstrated successfully. In addition, both nonvolatile data retention at 150degC and operation in a wide temperature range (from -40degC to 150degC) were confirmed.