Characteristics of Seebeck Coefficient in Silicon Nanowires Manufactured by CMOS Compatible Process

• Published in: Nanoscale research letters Vol. 5; no. 10; pp. 1654 - 1657
• Main Authors: Jang, Moongyu, Park, Youngsam, Jun, Myungsim, Hyun, Younghoon, Choi, Sung-Jin, Zyung, Taehyoung
• Format: Journal Article
• Language: English
• Published: United States New York : Springer-Verlag 18-07-2010; BioMed Central Ltd; SpringerOpen
• Subjects: Nanowire; nanowires; Seebeck coefficient; Silicon; Thermoelectric effect
• ISSN: 1931-7573; 1556-276X; 1556-276X
• DOI: 10.1186/1556-276X-5-1654

Silicon nanowires are patterned down to 30 nm using complementary metal-oxide-semiconductor (CMOS) compatible process. The electrical conductivities of n-/p-leg nanowires are extracted with the variation of width. Using this structure, Seebeck coefficients are measured. The obtained maximum Seebeck coefficient values are 122 μV/K for p-leg and −94 μV/K for n-leg. The maximum attainable power factor is 0.74 mW/m K² at room temperature.