Dissipation and quantum noise in chiral circuitry

Physica E: Low-dimensional Systems and Nanostructures 121, 114117 (2020) We obtain an empirical relation between the zero temperature, zero frequency quantum noise ${\small{(}}S{\small{(}}\omega=0{\small{)}}{\small{)}}$ and the related power dissipation ${\small{(}}D{\small{)}}$ for chiral circuitry...

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Main Authors: Wadhawan, Disha, Das, Sourin
Format: Journal Article
Language:English
Published: 25-07-2020
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Abstract Physica E: Low-dimensional Systems and Nanostructures 121, 114117 (2020) We obtain an empirical relation between the zero temperature, zero frequency quantum noise ${\small{(}}S{\small{(}}\omega=0{\small{)}}{\small{)}}$ and the related power dissipation ${\small{(}}D{\small{)}}$ for chiral circuitry. We consider the case of single quantum point contact (QPC) which induces inter-edge scattering of electrons among $"n"$ number of chiral edges of $\nu=1$ quantum Hall state. The ratio of total maximum power dissipation generated at the QPC ($D_{total}$) to the sum of auto-correlated noise generated in the chiral edge channels emanating out of the QPC region ($S_{total}$) is shown to be, $D_{total}/S_{total}{\small{(}}\omega=0{\small{)}} = V/{\small{}}4 e{\small{}}$ where $e$ is the electronic charge and $V$ is the voltage imposed on any one of the "$n$" incoming edge channels while keeping remaining "$n-1$" edge channels grounded. This implies that this ratio is universal except for a linear voltage bias dependence, i.e., it is independent of details of the scattering matrix ($S$-matrix) of the QPC region. Here the maximum power dissipation in each chiral edge is defined as the rate at which energy would be lost if the non-equilibrium distribution of electrons generated by the QPC region in each chiral edge is equilibrated to the corresponding zero temperature Fermi distribution. Further, for ${\cal Z}_n$ symmetric $S$-matrix, we show that the universal behaviour persists even when all the bias voltages imposed on the incoming edge channels are kept finite and distinct.
AbstractList Physica E: Low-dimensional Systems and Nanostructures 121, 114117 (2020) We obtain an empirical relation between the zero temperature, zero frequency quantum noise ${\small{(}}S{\small{(}}\omega=0{\small{)}}{\small{)}}$ and the related power dissipation ${\small{(}}D{\small{)}}$ for chiral circuitry. We consider the case of single quantum point contact (QPC) which induces inter-edge scattering of electrons among $"n"$ number of chiral edges of $\nu=1$ quantum Hall state. The ratio of total maximum power dissipation generated at the QPC ($D_{total}$) to the sum of auto-correlated noise generated in the chiral edge channels emanating out of the QPC region ($S_{total}$) is shown to be, $D_{total}/S_{total}{\small{(}}\omega=0{\small{)}} = V/{\small{}}4 e{\small{}}$ where $e$ is the electronic charge and $V$ is the voltage imposed on any one of the "$n$" incoming edge channels while keeping remaining "$n-1$" edge channels grounded. This implies that this ratio is universal except for a linear voltage bias dependence, i.e., it is independent of details of the scattering matrix ($S$-matrix) of the QPC region. Here the maximum power dissipation in each chiral edge is defined as the rate at which energy would be lost if the non-equilibrium distribution of electrons generated by the QPC region in each chiral edge is equilibrated to the corresponding zero temperature Fermi distribution. Further, for ${\cal Z}_n$ symmetric $S$-matrix, we show that the universal behaviour persists even when all the bias voltages imposed on the incoming edge channels are kept finite and distinct.
Author Wadhawan, Disha
Das, Sourin
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BackLink https://doi.org/10.48550/arXiv.1811.07289$$DView paper in arXiv
https://doi.org/10.1016/j.physe.2020.114117$$DView published paper (Access to full text may be restricted)
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Snippet Physica E: Low-dimensional Systems and Nanostructures 121, 114117 (2020) We obtain an empirical relation between the zero temperature, zero frequency quantum...
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Title Dissipation and quantum noise in chiral circuitry
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