Power considerations in the design of the Alpha 21264 microprocessor

• Published in: Annual ACM IEEE Design Automation Conference: Proceedings of the 35th annual conference on Design automation; 15-19 June 1998 pp. 726 - 731
• Main Authors: Gowan, Michael K., Biro, Larry L., Jackson, Daniel B.
• Format: Conference Proceeding
• Language: English
• Published: New York, NY, USA ACM 01-01-1998; IEEE
• Series: ACM Conferences
• Subjects: Applied computing > Computers in other domains > Personal computers and PC applications > Microcomputers; Applied computing > Physical sciences and engineering > Engineering; Circuits; Clocks; Computer systems organization > Dependable and fault-tolerant systems and networks; Frequency; General and reference > Cross-computing tools and techniques > Performance; Leakage current; Microprocessors; MOS devices; Networks > Network performance evaluation; Permission; Power dissipation; Power supplies; Subthreshold current; technology mapping; PLA-style logic blocks; programmable logic devices
• ISBN: 0897919645; 9780897919647
• DOI: 10.1145/277044.277226

Power dissipation is rapidly becoming a limiting factor in high performance microprocessor design due to ever increasing device counts and clock rates. The 21264 is a third generation Alpha microprocessor implementation, containing 15.2 million transistors and operating at 600 MHz. This paper describes some of the techniques the Alpha design team utilized to help manage power dissipation. In addition, the electrical design of the power, ground, and clock networks is presented.