Search Results - "van Huylenbroeck, S."

Investigation of PECVD dielectrics for nondispersive metal-insulator-metal capacitors by Van Huylenbroeck, S., Decoutere, S., Venegas, R., Jenei, S., Winderickx, G.

“…Metal-insulator-metal (MIM) capacitors with PECVD nitride exhibit trap-induced dispersive behavior, which leads to degradation in capacitor linearity at low…”
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On the Use of a SiGe Spike in the Emitter to Improve the f\hbox Product of High-Speed SiGe HBTs by Choi, L.J., Van Huylenbroeck, S., Piontek, A., Sibaja-Hernandez, A., Kunnen, E., Meunier-Beillard, P., van Noort, W.D., Hijzen, E., Decoutere, S.

“…Aggressive vertical scaling of SiGe HBTs has yielded impressive values for the cut-off frequencies (f T ), but these HBTs often suffer from too high current…”
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Impact of oxide liner properties on TSV Cu pumping and TSV stress by De Messemaeker, J., Pedreira, O. Varela, Moussa, A., Nabiollahi, N., Vanstreels, K., Van Huylenbroeck, S., Philipsen, H., Verdonck, P., Vandevelde, B., De Wolf, I., Beyne, E., Croes, K.

“…We investigated the impact of oxide liner elastic modulus and thickness on through-silicon via (TSV) Cu pumping and stress. A low-k dielectric liner showed a…”
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SiGe HBTs With Normal High-Speed Emitter-Up and Reverse Low-Power Collector-Up Operation by Li Jen Choi, Sibaja-Hernandez, A., Venegas, R., Van Huylenbroeck, S., Decoutere, S.

“…SiGe heterojunction bipolar transistors (HBTs) are usually optimized to obtain best performance in the forward operation mode. In this paper, we demonstrate…”
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Optimization of external poly base sheet resistance in 0.13 μm quasi self-aligned SiGe:C HBTs by You, S., Van Huylenbroeck, S., Nguyen, N.D., Sibaja-Hernandez, A., Venegas, R., Van Wichelen, K., Decoutere, S., De Meyer, K.

“…This paper investigates the optimization of the external polysilicon base sheet resistance of quasi self-aligned (QSA) SiGe:C HBTs from a 0.13 μm BiCMOS…”
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Impact of lateral and vertical scaling on the reliability of a low-complexity 200 GHz SiGe:C HBT by Piontek, A., Choi, L.J., Van Huylenbroeck, S., Vanhoucke, T., Hijzen, E., Decoutere, S.

“…As device scaling for high-performance bipolar transistors continues, not only the vertical scaling but also the lateral scaling with reduction of the…”
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Thermal, Mechanical and Reliability assessment of Hybrid bonded wafers, bonded at 2.5μm pitch by Cherman, V., Van Huylenbroeck, S., Lofrano, M., Chang, X., Oprins, H., Gonzalez, M., Van der Plas, G., Beyer, G., Rebibis, K. J., Beyne, E.

“…In this paper we address the thermal, mechanical and reliability performance of wafer-to-wafer hybrid bonded CMOS wafers manufactured using standard 65nm…”
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A Simple and Efficient RF Technique for TSV Characterization by Sun, X., Neve, C. Roda, Van Huylenbroeck, S., Van der Plas, G., Beyne, E.

“…This paper applies for the first time an RF equivalent of the four-point probe Kelvin DC technique to characterize the TSV inductance. This RF approach is…”
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TSV-assisted Hybrid FinFET CMOS - Silicon Photonics Technology for High Density Optical I/O by Guermandi, D, Bogaerts, L, Rakowski, M, Ban, Y, De Heyn, P, Pantano, N, Bex, P, De Coster, J, He, J, Phommahaxay, A, Balakrishnan, S, Demeurisse, C, Bertheau, J, Rebibis, K.J, Nolmans, P, Sun, X, Srinivasan, A, Van Huylenbroeck, S, Lardenois, S, Miller, A, Absil, P, Verheyen, P, Velenis, D, Pantouvaki, M, Van Campenhout, J

“…We demonstrate ultra-compact, low-power 40 Gbps NRZ (single-lane) transmitter and receiver functionality in a hybrid 14 nm FinFET CMOS-silicon photonics (SiPh)…”
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Towards THz SiGe HBTs by Chevalier, P., Meister, T. F., Heinemann, B., Van Huylenbroeck, S., Liebl, W., Fox, A., Sibaja-Hernandez, A., Chantre, A.

“…This paper summarizes the technological developments carried out on SiGe HBTs in the frame of the European project DOTFIVE. The architectures of the different…”
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Demonstration of a cost effective Cu electroless TSV metallization scheme by Vandersmissen, Kevin, Inoue, F., Velenis, D., Li, Y., Dictus, D., Frees, B., Van Huylenbroeck, S., Kondo, M., Seino, T., Heylen, N., Struyf, H., van der Veen, M. H.

“…In this work, we present a cost effective Cu electroless (ELD-Cu) metallization scheme in which through-silicon vias (TSVs), can be scaled towards higher…”
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Copper through silicon via induced keep out zone for 10nm node bulk FinFET CMOS technology by Guo, W., Moroz, V., Van der Plas, G., Choi, M., Redolfi, A., Smith, L., Eneman, G., Van Huylenbroeck, S., Su, P. D., Ivankovic, A., De Wachter, B., Debusschere, I., Croes, K., De Wolf, I., Mercha, A., Beyer, G., Swinnen, B., Beyne, E.

“…This work provides for the first time comprehensive and early guidelines for TSV integration in 10nm node bulk FinFET technology. The key contributors to the…”
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Implementation of a Si-rich SiON nucleation layer for an improved selective SiGe HBT architecture by Van Huylenbroeck, S., Loo, R., Decoutere, S., Vleugels, F., Kunnen, E., Schaekers, M., Caymax, M.

“…A Si-rich SiON is implemented as nucleation layer in a selective SiGe HBT architecture to improve the SiGe base layer process window and the reactor…”
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Non-destructive acoustic metrology and void detection in 3×50μm TSV by Mair, R., Kotelyanskii, M., Mehendale, M., Ru, X., Mukundhan, P., Kryman, T., Liebens, M., Van Huylenbroeck, S., Haensel, L., Miller, A., Beyne, E., Murray, T.

“…Through Silicon Via (TSV) technology represents one key aspect of 3D integration. International Technology Roadmap for Semiconductors (ITRS) has identified a…”
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Hybrid 14nm FinFET - Silicon Photonics Technology for Low-Power Tb/s/mm2 Optical I/O by Rakowski, M., Ban, Y., De Heyn, P., Pantano, N., Snyder, B., Balakrishnan, S., Van Huylenbroeck, S., Bogaerts, L., Demeurisse, C., Inoue, F., Rebibis, K. J., Nolmans, P., Sun, X., Bex, P., Srinivasan, A., De Coster, J., Lardenois, S., Miller, A., Absil, P., Verheyen, P., Velenis, D., Pantouvaki, M., Van Campenhout, J.

“…We demonstrate a microbump flip-chip integrated 14nm-FinFET CMOS-Silicon Photonics (SiPh) technology platform enabling ultra-low power Optical I/O transceivers…”
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Effect of Airgap Deep Trench Isolation on the Gamma Radiation Behavior of a 0.13 [Formula Omitted] SiGe:C NPN HBT Technology by Put, S, Simoen, E, Van Huylenbroeck, S, Claeys, C, Van Uffelen, M, Leroux, P

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Non-destructive acoustic metrology and void detection in 350 mu m TSV by Mair, R, Kotelyanskii, M, Mehendale, M, Ru, X, Mukundhan, P, Kryman, T, Liebens, M, Van Huylenbroeck, S, Haensel, L, Miller, A, Beyne, E, Murray, T

“…Through Silicon Via (TSV) technology represents one key aspect of 3D integration. International Technology Roadmap for Semiconductors (ITRS) has identified a…”
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Methodology for extracting the characteristic capacitances of a power MOSFET transistor, using conventional on-wafer testing techniques by Kerner, C., Ciofi, I., Chiarella, T., Van Huylenbroeck, S.

“…A methodology for extracting the characteristic reverse transfer-, input- and output-capacitance on power MOSFET transistors is presented in this work. We show…”
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Effect of Airgap Deep Trench Isolation on the Gamma Radiation Behavior of a 0.13 mu hbox m SiGe:C NPN HBT Technology by Put, S, Simoen, E, Van Huylenbroeck, S, Claeys, C, Van Uffelen, M, Leroux, P

“…The effect of an airgap deep trench isolation on the gamma radiation behavior of a 0.13 mum SiGe NPN HBT technology is studied with the help of in-situ…”
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Effect of Airgap Deep Trench Isolation on the Gamma Radiation Behavior of a 0.13 \mu} SiGe:C NPN HBT Technology by Put, S., Simoen, E., Van Huylenbroeck, S., Claeys, C., Van Uffelen, M., Leroux, P.

“…The effect of an airgap deep trench isolation on the gamma radiation behavior of a 0.13 mum SiGe NPN HBT technology is studied with the help of in-situ…”
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