Search Results - "del Alamo, J.A."
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TEM Observation of Crack- and Pit-Shaped Defects in Electrically Degraded GaN HEMTs
Published in IEEE electron device letters (01-10-2008)“…AlGaN/GaN high-electron mobility transistors stressed under dc bias at various channel temperatures were studied using transmission electron microscopy for…”
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Journal Article -
2
Critical Voltage for Electrical Degradation of GaN High-Electron Mobility Transistors
Published in IEEE electron device letters (01-04-2008)“…We have found that there is a critical drain-to-gate voltage beyond which GaN high-electron mobility transistors start to degrade in electrical-stress…”
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3
A physical model for the kink effect in InAlAs/InGaAs HEMTs
Published in IEEE transactions on electron devices (01-05-2000)“…We present a new model for the the kink effect in InAlAs/InGaAs HEMTs. The model suggests that the kink is due to a threshold voltage shift which arises from a…”
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4
The iLab Shared Architecture: A Web Services Infrastructure to Build Communities of Internet Accessible Laboratories
Published in Proceedings of the IEEE (01-06-2008)“…The Massachusetts Institute of Technology's iLab project has developed a distributed software toolkit and middleware service infrastructure to support…”
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5
30-nm InAs Pseudomorphic HEMTs on an InP Substrate With a Current-Gain Cutoff Frequency of 628 GHz
Published in IEEE electron device letters (01-08-2008)“…We report on InAs pseudomorphic high-electron mobility transistors (PHEMTs) on an InP substrate with record cutoff frequency characteristics. This result was…”
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6
Measurement of Channel Temperature in GaN High-Electron Mobility Transistors
Published in IEEE transactions on electron devices (01-12-2009)“…In this paper, a simple and reliable method to estimate the channel temperature of GaN high-electron mobility transistors (HEMTs) is proposed. The technique is…”
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7
Experimental comparison of RF power LDMOSFETs on thin-film SOI and bulk silicon
Published in IEEE transactions on electron devices (01-04-2002)“…Simultaneously fabricated RF power LDMOSFETs on thin-film SOI and bulk silicon wafers. This work compares their DC current-voltage (I-V), capacitance-voltage…”
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8
A Simple Current Collapse Measurement Technique for GaN High-Electron Mobility Transistors
Published in IEEE electron device letters (01-07-2008)“…Current collapse in GaN high-electron mobility transistors (HEMTs) is a temporary reduction of drain-current immediately after the application of high voltage…”
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9
A through-wafer interconnect in silicon for RFICs
Published in IEEE transactions on electron devices (01-11-2004)“…In order to minimize ground inductance in RFICs, we have developed a high-aspect ratio, through-wafer interconnect (or substrate via) in silicon that features…”
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10
Lateral and Vertical Scaling of \hbox \hbox\hbox HEMTs for Post-Si-CMOS Logic Applications
Published in IEEE transactions on electron devices (01-10-2008)“…In this paper, we have experimentally investigated the impact of lateral and vertical scaling of In 0.7 Ga 0.3 As high-electron-mobility transistors (HEMTs)…”
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11
Carrier-induced change in refractive index of InP, GaAs and InGaAsP
Published in IEEE journal of quantum electronics (01-01-1990)“…The change in refractive index Delta n produced by injection of free carriers in InP, GaAs, and InGaAsP is theoretically estimated. Bandfilling (Burstein-Moss…”
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12
Impact of substrate-surface potential on the performance of RF power LDMOSFETs on high-resistivity SOI
Published in IEEE transactions on electron devices (01-07-2006)“…This paper presents an in-depth study of the effects of substrate-surface potential on the RF power performance of laterally diffused MOSFETs (LDMOSFETs)…”
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13
Sub-40 nm SOI V-groove n-MOSFETs
Published in IEEE electron device letters (01-02-2002)“…We present output and transfer characteristics of single-gated, 36 nm, 46 nm and 56 nm channel length SOI MOSFETs with a V-groove design. For the shortest…”
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14
A Faraday cage isolation structure for substrate crosstalk suppression
Published in IEEE microwave and wireless components letters (01-10-2001)“…We have exploited a recently-developed, through-wafer via technology in silicon to implement a novel Faraday cage scheme for substrate crosstalk suppression in…”
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15
An insulator-lined silicon substrate-via technology with high aspect ratio
Published in IEEE transactions on electron devices (01-09-2001)“…We have developed a novel high-aspect ratio substrate-via technology in silicon that features a SiN insulator liner. In this technology, the via is completely…”
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16
Positive temperature coefficient of impact ionization in strained-Si
Published in IEEE transactions on electron devices (01-07-2005)“…We have experimentally studied impact ionization (II) in the strained-Si layer of a strained-Si/SiGe heterostructure. Our key finding is that the impact…”
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17
GaN HEMT reliability
Published in Microelectronics and reliability (01-09-2009)“…This paper reviews the experimental evidence behind a new failure mechanism recently identified in GaN high-electron mobility transistors subject to electrical…”
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Journal Article Conference Proceeding -
18
RF power LDMOSFET on SOI
Published in IEEE electron device letters (01-03-2001)“…We have fabricated a SOI laterally diffused MOSFET that is designed for use in radio frequency power amplifiers for wireless system-on-a-chip applications. The…”
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19
Hydrogen sensitivity of InP HEMTs with WSiN-based gate stack
Published in IEEE transactions on electron devices (01-03-2005)“…We have experimentally investigated the hydrogen sensitivity of InP high-electron mobility transistors (HEMTs) with a WSiN-Ti-Pt-Au gate stack. We have found…”
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20
A metal/polysilicon damascene gate technology for RF power LDMOSFETs
Published in IEEE electron device letters (01-11-2003)“…This letter describes a metal/polysilicon damascene gate technology for RF power LDMOSFETs. We compare the performance of SOI LDMOSFETs with metal/polysilicon…”
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