Search Results - "de Souza, Joel P."

Diffusion-Controlled Porous Crystalline Silicon Lithium Metal Batteries by Collins, John, de Souza, Joel P., Hopstaken, Marinus, Ott, John A., Bedell, Stephen W., Sadana, Devendra K.

“…Nanostructured porous silicon materials have recently advanced as hosts for Li-metal plating. However, limitations involve detrimental silicon…”
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CMOS-Compatible Self-Aligned In0.53Ga0.47As MOSFETs With Gate Lengths Down to 30 nm by Majumdar, Amlan, Yanning Sun, Cheng-Wei Cheng, Young-Hee Kim, Rana, Uzma, Martin, Ryan M., Bruce, Robert L., Kuen-Ting Shiu, Yu Zhu, Farmer, Damon B., Hopstaken, Marinus, Joseph, Eric A., de Souza, Joel P., Frank, Martin M., Szu-Lin Cheng, Kobayashi, Masaharu, Duch, Elizabeth A., Sadana, Devendra K., Dae-Gyu Park, Leobandung, Effendi

“…We demonstrate self-aligned fully-depleted 20-nm-thick In 0.53 Ga 0.47 As-channel MOSFETs using CMOS-compatible device structures and manufacturable process…”
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High-Performance In0.7Ga0.3As-Channel MOSFETs With High-κ Gate Dielectrics and α-Si Passivation by YANNING SUN, KIEWRA, Edward W, DE SOUZA, Joel P, BUCCHIGNANO, James J, FOGEL, Keith E, SADANA, Devendra K, SHAHIDI, Ghavam G

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Comparison of back interface structure alternatives using two sided optical excitation by Hovel, H J, De Souza, J P, Marshall, E D

“…The back interface of a solar cell is an important part of the device structure, providing several important functions: 1) reduces the effective surface…”
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Fundamentals, impedance, and performance of solid-state Li-metal microbatteries by Collins, John, de Souza, Joel P., Lee, Yun Seog, Pacquette, Adele, Papalia, John M., Bishop, Douglas M., Todorov, Teodor, Krishnan, Mahadevaiyer, Joseph, Eric, Rozen, John, Sadana, Devendra

“…The authors report novel results toward optimizing the electrochemical performance of high vacuum deposited lithium-based all solid-state thin film…”
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CMOS-Compatible Self-Aligned In sub(0.53)Ga sub(0.47)As MOSFETs With Gate Lengths Down to 30 nm by Majumdar, Amlan, Sun, Yanning, Cheng, Cheng-Wei, Kim, Young-Hee, Rana, Uzma, Martin, Ryan M, Bruce, Robert L, Shiu, Kuen-Ting, Zhu, Yu, Farmer, Damon B, Hopstaken, Marinus, Joseph, Eric A, de Souza, Joel P, Frank, Martin M, Cheng, Szu-Lin, Kobayashi, Masaharu, Duch, Elizabeth A, Sadana, Devendra K, Park, Dae-Gyu, Leobandung, Effendi

“…We demonstrate self-aligned fully-depleted 20-nm-thick In sub(0.53)Ga sub(0.47)As-channe l MOSFETs using CMOS-compatible device structures and manufacturable…”
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High performance cmos bulk technology using direct silicon bond (dsb) mixed crystal orientation substrates by Chun-Yung Sung, Haizhou Yin, Ng, H.Y., Saenger, K.L., Chan, V., Crowder, S.W., Jinghong Li, Ott, J.A., Bendernagel, R., Kempisty, J.J., Ku, V., Lee, H.K., Zhijiong Luo, Madan, A., Mo, R.T., Nguyen, P.Y., Pfeiffer, G., Raccioppo, M., Rovedo, N., Sadana, D., de Souza, J.P., Rong Zhang, Zhibin Ren, Wann, C.H.

“…High performance 65-nm technology (L poly =45nm, EOT=1.2nm) bulk CMOS has been demonstrated for the first time on mixed orientation substrates formed by using…”
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