Search Results - "Zulkifli, T.Z.A."

  • Showing 1 - 15 results of 15
Refine Results
  1. 1

    Evaluation of five compensation circuits for electric vehicle inductively coupled power transfer (ICPT) by A.F.A. Aziz, Romlie, M F, T.Z.A. Zulkifli, Baharudin, Z

    Published in IET Conference Proceedings (05-09-2018)
    “…This paper analyzed and evaluated the output power and efficiency characteristics from five new compensation circuits for inductively coupled power transfer…”
    Get full text
    Conference Proceeding
  2. 2

    5-GHz low-phase noise quadrature VCO in 0.13−μm RF CMOS process technology by Zafar, S., Awan, M., Zulkifli, T.Z.A.

    “…In this paper, a 5 GHz low-phase noise RF CMOS quadrature voltage controlled oscillator (QVCO) is presented. The quadrature signals are generated by coupling…”
    Get full text
    Conference Proceeding
  3. 3

    0.18 µm fully integrated 900 MHz CMOS LNA with input and output on-chip matching for multi-standard mobile receiver by Mustaffa, M.T., Zayegh, A., Veljanovski, R., Stojcevksi, A., Zulkifli, T.Z.A.

    “…This paper presents a fully integrated single-ended low noise amplifier (LNA) for GSM (GSM850 and GSM900) and UMTS (UMTS Band V and VI). The design and…”
    Get full text
    Conference Proceeding
  4. 4

    A 10-Gb/s fully balanced differential output transimpedance amplifier in 0.18-μm CMOS technology for SDH/SONET application by Shammugasamy, B., Zulkifli, T.Z.A.

    “…In this paper, a fully balanced 10-Gb/s differential output transimpedance amplifier (TIA) is realized in 0.18-mum CMOS technology for SDH/SONET application…”
    Get full text
    Conference Proceeding
  5. 5

    A Low-Phase Noise and High Output Swing RF LC-VCO in CMOS Technology by Ramiah, H., Zulkifli, T.Z.A.

    “…This paper presents the design of a 1.8-V, 3.5GHz CMOS complementary cross-coupled LC-VCO designed for WLAN IEEE 802.11a, two step frequency up-conversion…”
    Get full text
    Conference Proceeding
  6. 6

    Design, Simulation and Measurement Analysis on the S-parameters of an Inductively-degenerated Common-source Open-drain Cascode Low Noise Amplifier by Noh, N.M., Zulkifli, T.Z.A.

    “…An inductively-degenerated common-source (CS) open-drain cascode LNA was designed for W-CDMA application. The operating frequency for the design was at 2.14…”
    Get full text
    Conference Proceeding
  7. 7

    Study and analysis of a 0.18 μm single-ended inductively-degenerated common-source cascode LNA under post-layout corner conditions by Noh, N.M., Zulkifli, T.Z.A.

    “…This paper is on the study and analysis of the effects of corner conditions and post-layout simulations performed on a single-ended inductively degenerated…”
    Get full text
    Conference Proceeding
  8. 8

    Design of Voltage controlled oscillator (VCO) for ultra wideband (UWB) CMOS frequency synthesizer by Zafar, S., Zulkifli, T.Z.A., Awan, M.

    “…Voltage controlled oscillator is one of the fundamental building blocks in the frequency synthesizer architecture. A 4.224-GHz CMOS complementary cross-coupled…”
    Get full text
    Conference Proceeding
  9. 9

    Design of 2.5V, 900MHz phase-locked loop (PLL) using 0.25/spl mu/m TSMC CMOS technology by Lee Ping Seng, Zulkifli, T.Z.A., Noh, N.M., Saibon, B.

    “…In this paper, a 2.5V, operating at 900MHz phase-locked loop implemented in 0.25/spl mu/m TSMC CMOS process technology is presented. A high speed PFD is…”
    Get full text
    Conference Proceeding
  10. 10

    Encoding characteristics of a 2 channel optical motion detector by Teoh Boon Chin, Saibon, B., Zulkifli, T.Z.A., Aziz, Z.A.A.

    “…This paper presents the design of front-end modules of a converter of an optical encoder and its key characteristics to detect motion in linear or rotary…”
    Get full text
    Conference Proceeding
  11. 11

    Design of tunable CMOS up-conversion mixer for RF integrated circuit by Ramiah, H., Zulkifli, T.Z.A.

    “…A high frequency 1-3 GHz tunable pure NMOS up-conversion mixer topology is presented. The mixer is implemented in a 0.25 /spl mu/m CMOS process technology…”
    Get full text
    Conference Proceeding
  12. 12

    A monolithic 622 Mb/S half rate clock and data recovery circuit utilizing a novel linear phase detector by Jiun, C.H., Zulkifli, T.Z.A., Aziz, Z.A.A., Noh, N.M.

    “…Clock and data recovery (CDR) circuits are crucial components in high speed transceivers. In order to ensure synchronization between data and clock in the most…”
    Get full text
    Conference Proceeding
  13. 13

    Design and Simulation of RF-CMOS Spiral Inductors for ISM Band RFID Reader Circuits by Uddin, M.J., Nordin, A.N., Ibrahimy, M.I., Reaz, M.B.I., Zulkifli, T.Z.A., Hasan, M.A.

    “…The recent popularity of RFID tags has generated research for accompanying miniature, low-power reader circuits. This work illustrates the design of RF…”
    Get full text
    Conference Proceeding
  14. 14

    Design characterization of a 1.2V 900MHz CMOS current mode down-conversion mixer with filter by Pui Woon Sang, Noh, N.M., Zulkifli, T.Z.A., Aziz, Z.A.A., Saibon, B.

    “…The design of a CMOS down-conversion mixer using current mode multiplication technique is characterized. For a mixer, the intermediate frequency f/sub IF/ at…”
    Get full text
    Conference Proceeding
  15. 15

    A 1.8-V fully differential 2-stage OPAMP switched-capacitor delta-sigma modulator for Bluetooth application by Aziz, Z.A.A., Zulkifli, T.Z.A., Saibon, B.

    “…This paper presents a fully-differential OPAMP for the switched-capacitor multi-bit delta-sigma modulator. The OPAMP has been designed using Silterra 0.18-/spl…”
    Get full text
    Conference Proceeding