Search Results - "Zacchigna, Federico"

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  1. 1

    Methodology for CNN Implementation in FPGA-Based Embedded Systems by Zacchigna, Federico G.

    Published in IEEE embedded systems letters (01-06-2023)
    “…The increasing interest in convolutional neural networks (CNNs) is driving the study and design of different implementations for a variety of platforms, each…”
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    Journal Article
  2. 2

    MESA: A formal approach to compute consensus in WSNs by Zacchigna, Federico G., Lutenberg, Ariel, Vargas, Fabian

    “…Consensus algorithms are implemented over Wireless Sensor Networks (WSN) for computing a distributed variable measurement or performing Data Fusion (DF). In a…”
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    Conference Proceeding Journal Article
  3. 3

    Firsynth: A CAD tool for high-level FIR filter synthesis by Alpago, Octavio H., Zacchigna, Federico G., Lutenberg, Ariel

    “…A software tool for high-level synthesis of Finite Impulse Response (FIR) filters is presented. The tool is based on Canonic Signed Digit (CSD) coding for…”
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    Conference Proceeding
  4. 4

    A novel consensus algorithm proposal: Measurement estimation by silent agreement (MESA) by Zacchigna, Federico G., Lutenberg, Ariel

    “…Energy consumption is one of the fundamental problems in wireless sensor networks (WSN). In this paper the energy optimization problem is addressed in a…”
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    Conference Proceeding
  5. 5

    An introductory electronics course oriented to develop real-life-engineering design skills by Lutenberg, A., Carbonetto, S., Inza, M. G., Rus, D., Venturino, G., Natale, L., Zacchigna, F.

    “…This paper presents an electronics course, which based solely on elementary electromagnetic concepts, introduces in one term the topics of Semiconductor…”
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    Conference Proceeding
  6. 6

    Low size FFT core for OFDM communications by Cassagnes, Andres D., Zacchigna, Federico G., Alpago, Octavio, Lutenberg, Ariel

    “…In this work two FFT architectures to be used in a ISDB-T OFDM modulator are presented. The proposed architectures are based in the Radix algorithm. In…”
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    Conference Proceeding
  7. 7

    Implementation of a QR Decomposition Processor using Walke Mapping on FPGA by Camarda, Federico D., Alpago, Octavio, Alvarez, Nicolas, Zacchigna, Federico, Lutenberg, Ariel

    “…This work presents the development and FPGA implementation of a QR Decomposition Processor capable of solving the Recursive Least Squares (RLS) algorithm…”
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    Conference Proceeding
  8. 8

    FPGA implementation of a pixel auto-configuration system for an NDB-encoder sensor by Calarco, Nicolas, Zacchigna, Federico, Vargas, Fabian, Lutenberg, Ariel, Lipovetzky, Jose, Quintian, Fernando Perez

    “…In previous works we introduced optical encoders based on non-diffractive beams (NDB) and showed that they extend the mechanical tolerance limits beyond the…”
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    Conference Proceeding
  9. 9