Search Results - "Yoo, Seyeon"

A PVT-Robust and Low-Jitter Ring-VCO-Based Injection-Locked Clock Multiplier With a Continuous Frequency-Tracking Loop Using a Replica-Delay Cell and a Dual-Edge Phase Detector by Choi, Seojin, Yoo, Seyeon, Lim, Younghyun, Choi, Jaehyouk

“…A low-jitter, ring-type voltage-controlled oscillator (VCO)-based injection-locked clock multiplier (ILCM) with a continuous frequency-tracking loop (FTL) for…”
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A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique by Lee, Yongsun, Seong, Taeho, Yoo, Seyeon, Choi, Jaehyouk

“…A low-jitter and low-reference-spur ring-type voltage-controlled oscillator (VCO)-based switched-loop filter (SLF) phase-locked loop (PLL) is presented. To…”
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A Low-Integrated-Phase-Noise 27-30-GHz Injection-Locked Frequency Multiplier With an Ultra-Low-Power Frequency-Tracking Loop for mm-Wave-Band 5G Transceivers by Yoo, Seyeon, Choi, Seojin, Kim, Juyeop, Yoon, Heein, Lee, Yongsun, Choi, Jaehyouk

“…An ultra-low-phase-noise injection-locked frequency multiplier (ILFM) for millimeter wave (mm-wave) fifth-generation transceivers is presented. Using an…”
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A −242dB FOM and −75dBc-reference-spur ring-DCO-based all-digital PLL using a fast phase-error correction technique and a low-power optimal-threshold TDC by Taeho Seong, Yongsun Lee, Seyeon Yoo, Jaehyouk Choi

“…To improve efficiency in the use of silicon, there have been many efforts to develop ring-oscillator-based clock generators with low jitter. A PLL using a fast…”
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A 12.24-GHz MDLL With a 102-Multiplication Factor Using a Power-Gating-Based Ring Oscillator by Cho, Yoonseo, Lee, Jeonghyun, Park, Suneui, Yoo, Seyeon, Choi, Jaehyouk

“…This work presents a multiplying delay-locked loop (MDLL) that can generate an ultralow jitter output signal, <inline-formula> <tex-math…”
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An Ultra-Low Jitter, Low-Power, 102-GHz PLL Using a Power-Gating Injection-Locked Frequency Multiplier-Based Phase Detector by Park, Suneui, Choi, Seojin, Yoo, Seyeon, Cho, Yoonseo, Choi, Jaehyouk

“…This work presents an ultra-low jitter, direct <inline-formula> <tex-math notation="LaTeX">W </tex-math></inline-formula>-band phase-locked loop (PLL). Using…”
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A Sub-100 fs-Jitter 8.16-GHz Ring-Oscillator-Based Power-Gating Injection-Locked Clock Multiplier With the Multiplication Factor of 68 by Park, Suneui, Yoo, Seyeon, Shin, Yuhwan, Lee, Jeonghyun, Choi, Jaehyouk

“…This work presents an ultralow-jitter ring-oscillator (RO)-based injection-locked clock multiplier (ILCM). Using the power-gating (PG) injection method that…”
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A 320-fs RMS Jitter and - 75-dBc Reference-Spur Ring-DCO-Based Digital PLL Using an Optimal-Threshold TDC by Seong, Taeho, Lee, Yongsun, Yoo, Seyeon, Choi, Jaehyouk

“…This paper presents a ring-type, digitally controlled oscillator (DCO)-based integer-<inline-formula> <tex-math notation="LaTeX">{N}…”
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A Low-Jitter and Low-Reference-Spur Ring-VCO- Based Injection-Locked Clock Multiplier Using a Triple-Point Background Calibrator by Yoo, Seyeon, Choi, Seojin, Lee, Yongsun, Seong, Taeho, Lim, Younghyun, Choi, Jaehyouk

“…This work presents a low-jitter, low-reference-spur ring voltage-controlled oscillator (ring VCO)-based injection-locked clock multiplier (ILCM). Since the…”
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A −242-dB FOM and −71-dBc reference spur ring-VCO-based ultra-low-jitter switched-loop-filter PLL using a fast phase-error correction technique by Taeho Seong, Yongsun Lee, Seyeon Yoo, Jaehyouk Choi

“…This work presents an ultra-low jitter, low-reference spur switched-loop-filter (SLF) PLL that uses a fast phase-error correction (FPEC) technique that…”
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A 2-8 GHz Wideband Dually Frequency-Tuned Ring-VCO With a Scalable by Yoo, Seyeon, Kim, Jae Joon, Choi, Jaehyouk

“…A 2-8 GHZ wideband dual-tuned ring voltage- controlled oscillator (VCO) has been designed and fabricated in TSMC 65nm CMOS process. Using a 6-bit…”
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Synthesis of diverse aryl‐substituted amino propanes by Yoo, Seyeon, Yi, Sojeong, Ha, Hyun‐Joon

“…Amines bearing diverse aryl substituents for potential utilities as energy and new materials have been synthesized from aziridine‐2‐carboxaldehyde and diverse…”
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An Ultra-Low-Jitter 22.8-GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier With a Multiplication Factor of 114 by Choi, Seojin, Yoo, Seyeon, Lee, Yongsun, Jo, Yongwoo, Lee, Jeonghyun, Lim, Younghyun, Choi, Jaehyouk

“…An ultra-low-jitter, ring- LC -hybrid injection-locked clock multiplier (ILCM) is presented to achieve a high multiplication factor of 114. The proposed hybrid…”
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153 FSRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHZ Ring-LC-Hybrid Injection-Locked Clock Multiplier by Seojin Choi, Seyeon Yoo, Yongsun Lee, Yongwoo Jo, Jeonghyun Lee, Younghyun Lim, Jaehyouk Choi

“…This work presents an ultra-low-jitter hybrid injection-locked clock multiplier (ILCM) that cascades a ring ILCM and an LC ILCM to achieve a high…”
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A 0.1-1.5-GHz Wide Harmonic-Locking-Free Delay-Locked Loop Using an Exponential DAC by Park, Suneui, Kim, Juyeop, Hwang, Chanwoong, Park, Hangi, Yoo, Seyeon, Seong, Taeho, Choi, Jaehyouk

“…This letter presents a delay-locked loop (DLL) that can have a wide harmonic-locking-free frequency range, by using a digital-to-analog converter-based…”
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A 122fsrms-Jitter and −60dBc-Reference-Spur 12.24GHz MDLL with a 102 - Multiplication Factor Using a Power-Gating Technique by Cho, Yoonseo, Lee, Jeonghyun, Park, Suneui, Yoo, Seyeon, Choi, Jaehyouk

“…This work presents a low-jitter and high-frequency ring-oscillator (RO)-based multiplying DLL (MDLL). To overcome the limit of conventional MDLLs that use a…”
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A 97fsrms-Jitter and 68-Multiplication Factor, 8.16GHz Ring-Oscillator Injection-Locked Clock Multiplier with Power-Gating Injection-Locking and Background Multi-Functional Digital Calibrator by Park, Suneui, Yoo, Seyeon, Shin, Yuhwan, Lee, Jeonghyun, Choi, Jaehyouk

“…To generate low-jitter, high-frequency signals with ring oscillators (ROs), injection-locked clock multipliers (ILCMs) are the most suitable architecture due…”
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A 0.0084-mV-FOM, Fast-Transient and Low-Power External-Clock-Less Digital LDO Using a Gear-Shifting Comparator for the Wide-Range Adaptive Sampling Frequency by Bang, Jooeun, Choi, Seojin, Yoo, Seyeon, Lee, Jeonghyun, Kim, Juyeop, Choi, Jaehyouk

“…This work presents a fast-transient and low-power, external-clock-less digital low-dropout regulator (DLDO) using a wide-range adaptive sampling frequency,…”
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30.9 A 140fsrms-Jitter and -72dBc-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Using a Background Triple-Point Frequency/Phase/Slope Calibrator by Yoo, Seyeon, Choi, Seojin, Lee, Yongsun, Seong, Taeho, Lim, Younghyun, Choi, Jaehyouk

“…An injection-locked clock multiplier (ILCM) is one of the best options to generate low-jitter high-frequency signals, while using a ring VCO. In the sense that…”
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A Fast-Transient and High-Accuracy, Adaptive-Sampling Digital LDO Using a Single-VCO-Based Edge-Racing Time Quantizer by Lee, Jeonghyun, Bang, Jooeun, Lim, Younghyun, Yoo, Seyeon, Lee, Yongsun, Seong, Taeho, Choi, Jaehyouk

“…A digital low-dropout (LDO) voltage regulator using a single-VCO-based edge-racing time quantizer (SVER TQ) was designed to achieve a fast-transient response…”
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